brechtve-kicad-things/Libraries/BrechtVE_DebugHeader.lib at master · Fescron/brechtve-kicad-things · GitHub

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EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# DebugHeader_Cortex-M_JTAG_10p
#
DEF DebugHeader_Cortex-M_JTAG_10p J 0 40 Y Y 1 F N
F0 "J" 0 -350 50 H V C CNN
F1 "DebugHeader_Cortex-M_JTAG_10p" 0 -450 50 H V C CNN
F2 "" -450 100 50 H I C CNN
F3 "" -450 100 50 H I C CNN
DRAW
T 0 25 350 50 0 0 0 "Cortex-M JTAG" Normal 0 C C
S -350 300 400 -300 0 0 0 f
X VTREF 1 -450 200 100 R 50 50 1 1 W
X ~RESET 10 500 -200 100 L 50 50 1 1 B
X TMS 2 500 200 100 L 50 50 1 1 O
X GND 3 -450 100 100 R 50 50 1 1 W
X TCK 4 500 100 100 L 50 50 1 1 O
X GND 5 -450 0 100 R 50 50 1 1 W
X TDO 6 500 0 100 L 50 50 1 1 I
X RTCK(key) 7 -450 -100 100 R 50 50 1 1 I
X TDI 8 500 -100 100 L 50 50 1 1 O
X ~TRST 9 -450 -200 100 R 50 50 1 1 O
ENDDRAW
ENDDEF
#
# DebugHeader_Cortex-M_JTAG_10p_TagConnect
#
DEF DebugHeader_Cortex-M_JTAG_10p_TagConnect J 0 40 Y Y 1 F N
F0 "J" 0 -350 50 H V C CNN
F1 "DebugHeader_Cortex-M_JTAG_10p_TagConnect" 0 -450 50 H V C CNN
F2 "" -450 100 50 H I C CNN
F3 "" -450 100 50 H I C CNN
DRAW
T 0 25 350 50 0 0 0 "Cortex-M JTAG" Normal 0 C C
T 0 25 425 50 0 0 0 "TagConnect 2050" Normal 0 C C
S -350 300 400 -300 0 0 0 f
X VTREF 1 -450 200 100 R 50 50 1 1 W
X ~RESET 10 500 200 100 L 50 50 1 1 B
X TMS 2 -450 100 100 R 50 50 1 1 O
X GND 3 -450 0 100 R 50 50 1 1 W
X TCK 4 -450 -100 100 R 50 50 1 1 O
X GND(5v) 5 -450 -200 100 R 50 50 1 1 W
X TDO 6 500 -200 100 L 50 50 1 1 I
X RTCK 7 500 -100 100 L 50 50 1 1 I
X TDI 8 500 0 100 L 50 50 1 1 O
X ~TRST 9 500 100 100 L 50 50 1 1 O
ENDDRAW
ENDDEF
#
# DebugHeader_Cortex-M_SWD_UART_10p
#
DEF DebugHeader_Cortex-M_SWD_UART_10p J 0 40 Y Y 1 F N
F0 "J" 0 -350 50 H V C CNN
F1 "DebugHeader_Cortex-M_SWD_UART_10p" 0 -450 50 H V C CNN
F2 "" -450 100 50 H I C CNN
F3 "" -450 100 50 H I C CNN
DRAW
T 0 25 350 50 0 0 0 "Cortex-M SWD/UART" Normal 0 C C
S -350 300 400 -300 0 0 0 f
X VTREF 1 -450 200 100 R 50 50 1 1 W
X ~RESET 10 500 -200 100 L 50 50 1 1 B
X SWDIO 2 500 200 100 L 50 50 1 1 B
X GND 3 -450 100 100 R 50 50 1 1 W
X SWCLK 4 500 100 100 L 50 50 1 1 P
X GND 5 -450 0 100 R 50 50 1 1 W
X SWO 6 500 0 100 L 50 50 1 1 I
X jl.RX(key) 7 -450 -100 100 R 50 50 1 1 I
X jl.TX(nc) 8 500 -100 100 L 50 50 1 1 P
X GNDd(nc) 9 -450 -200 100 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
# DebugHeader_Cortex-M_SWD_UART_10p_TagConnect
#
DEF DebugHeader_Cortex-M_SWD_UART_10p_TagConnect J 0 40 Y Y 1 F N
F0 "J" 0 -350 50 H V C CNN
F1 "DebugHeader_Cortex-M_SWD_UART_10p_TagConnect" 0 -450 50 H V C CNN
F2 "" -450 100 50 H I C CNN
F3 "" -450 100 50 H I C CNN
DRAW
T 0 25 350 50 0 0 0 "Cortex-M SWD/UART" Normal 0 C C
T 0 25 425 50 0 0 0 "TagConnect 2050" Normal 0 C C
S -350 300 400 -300 0 0 0 f
X VTREF 1 -450 200 100 R 50 50 1 1 W
X ~RESET 10 500 200 100 L 50 50 1 1 B
X SWDIO 2 -450 100 100 R 50 50 1 1 B
X GND 3 -450 0 100 R 50 50 1 1 W
X SWCLK 4 -450 -100 100 R 50 50 1 1 P
X GND(5v) 5 -450 -200 100 R 50 50 1 1 W
X SWO 6 500 -200 100 L 50 50 1 1 I
X jl.RX(nc) 7 500 -100 100 L 50 50 1 1 I
X jl.TX(nc) 8 500 0 100 L 50 50 1 1 P
X GNDd(nc) 9 500 100 100 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# DebugHeader_J-Link_Cortex-M_JTAG_10p_TagConnect
#
DEF DebugHeader_J-Link_Cortex-M_JTAG_10p_TagConnect J 0 40 Y Y 1 F N
F0 "J" 0 -350 50 H V C CNN
F1 "DebugHeader_J-Link_Cortex-M_JTAG_10p_TagConnect" 0 -450 50 H V C CNN
F2 "" -450 100 50 H I C CNN
F3 "" -450 100 50 H I C CNN
DRAW
T 0 25 350 50 0 0 0 "J-Link 10p Cortex-M JTAG" Normal 0 C C
T 0 25 425 50 0 0 0 "TagConnect 2050" Normal 0 C C
S -350 300 400 -300 0 0 0 f
X VTref 1 -450 200 100 R 50 50 1 1 W
X ~RESET 10 500 200 100 L 50 50 1 1 B
X TMS 2 -450 100 100 R 50 50 1 1 O
X GND 3 -450 0 100 R 50 50 1 1 W
X TCK 4 -450 -100 100 R 50 50 1 1 O
X 5V-Supply 5 -450 -200 100 R 50 50 1 1 w
X TDO 6 500 -200 100 L 50 50 1 1 I
X RTCK 7 500 -100 100 L 50 50 1 1 I
X TDI 8 500 0 100 L 50 50 1 1 O
X ~TRST 9 500 100 100 L 50 50 1 1 O
ENDDRAW
ENDDEF
#
# DebugHeader_J-Link_Cortex-M_JTAG_9p
#
DEF DebugHeader_J-Link_Cortex-M_JTAG_9p J 0 40 Y Y 1 F N
F0 "J" 0 -350 50 H V C CNN
F1 "DebugHeader_J-Link_Cortex-M_JTAG_9p" 0 -450 50 H V C CNN
F2 "" -450 100 50 H I C CNN
F3 "" -450 100 50 H I C CNN
DRAW
T 0 25 350 50 0 0 0 "J-Link 9p Cortex-M JTAG" Normal 0 C C
S -350 300 400 -300 0 0 0 f
X VTref 1 -450 200 100 R 50 50 1 1 W
X ~RESET 10 500 -200 100 L 50 50 1 1 B
X TMS 2 500 200 100 L 50 50 1 1 O
X GND 3 -450 100 100 R 50 50 1 1 W
X TCK 4 500 100 100 L 50 50 1 1 O
X GND 5 -450 0 100 R 50 50 1 1 W
X TDO 6 500 0 100 L 50 50 1 1 I
X key 7 -450 -100 100 R 50 50 1 1 N
X TDI 8 500 -100 100 L 50 50 1 1 O
X ~TRST 9 -450 -200 100 R 50 50 1 1 O
ENDDRAW
ENDDEF
#
# DebugHeader_J-Link_Cortex-M_SWD_10p_TagConnect
#
DEF DebugHeader_J-Link_Cortex-M_SWD_10p_TagConnect J 0 40 Y Y 1 F N
F0 "J" 0 -350 50 H V C CNN
F1 "DebugHeader_J-Link_Cortex-M_SWD_10p_TagConnect" 0 -450 50 H V C CNN
F2 "" -450 100 50 H I C CNN
F3 "" -450 100 50 H I C CNN
DRAW
T 0 25 350 50 0 0 0 "J-Link 10p Cortex-M SWD" Normal 0 C C
T 0 25 425 50 0 0 0 "TagConnect 2050" Normal 0 C C
S -350 300 400 -300 0 0 0 f
X VTref 1 -450 200 100 R 50 50 1 1 W
X ~RESET 10 500 200 100 L 50 50 1 1 B
X SWDIO 2 -450 100 100 R 50 50 1 1 B
X GND 3 -450 0 100 R 50 50 1 1 W
X SWCLK 4 -450 -100 100 R 50 50 1 1 O
X 5V-Supply 5 -450 -200 100 R 50 50 1 1 w
X SWO 6 500 -200 100 L 50 50 1 1 I
X NC 7 500 -100 100 L 50 50 1 1 N
X NC 8 500 0 100 L 50 50 1 1 N
X NC 9 500 100 100 L 50 50 1 1 N
ENDDRAW
ENDDEF
#
# DebugHeader_J-Link_Cortex-M_SWD_9p
#
DEF DebugHeader_J-Link_Cortex-M_SWD_9p J 0 40 Y Y 1 F N
F0 "J" 0 -350 50 H V C CNN
F1 "DebugHeader_J-Link_Cortex-M_SWD_9p" 0 -450 50 H V C CNN
F2 "" -450 100 50 H I C CNN
F3 "" -450 100 50 H I C CNN
DRAW
T 0 25 350 50 0 0 0 "J-Link 9p Cortex-M SWD" Normal 0 C C
S -350 300 400 -300 0 0 0 f
X VTref 1 -450 200 100 R 50 50 1 1 W
X ~RESET 10 500 -200 100 L 50 50 1 1 B
X SWDIO 2 500 200 100 L 50 50 1 1 B
X GND 3 -450 100 100 R 50 50 1 1 W
X SWCLK 4 500 100 100 L 50 50 1 1 O
X GND 5 -450 0 100 R 50 50 1 1 W
X SWO 6 500 0 100 L 50 50 1 1 I
X key 7 -450 -100 100 R 50 50 1 1 N
X NC 8 500 -100 100 L 50 50 1 1 N
X NC 9 -450 -200 100 R 50 50 1 1 N
ENDDRAW
ENDDEF
#
# DebugHeader_UART_4p
#
DEF DebugHeader_UART_4p J 0 40 Y Y 1 F N
F0 "J" 0 -300 50 H V C CNN
F1 "DebugHeader_UART_4p" 0 -400 50 H V C CNN
F2 "" -200 150 50 H I C CNN
F3 "" -200 150 50 H I C CNN
DRAW
T 0 25 300 50 0 0 0 UART Normal 0 C C
S -100 250 150 -250 0 1 0 f
X TXD 1 -200 150 100 R 50 50 1 1 I
X RXD 2 -200 50 100 R 50 50 1 1 O
X GND 3 -200 -50 100 R 50 50 1 1 W
X VDD 4 -200 -150 100 R 50 50 1 1 W
ENDDRAW
ENDDEF
#
#End Library