tinyboy.c

/* Generated by proto framework -- Board: TinyBoy */
#include <stdio.h>
#include <stdlib.h>
#include <stdint.h>
#include <stdbool.h>
#include <string.h>

typedef struct {
    uint16_t PC;  /* Program counter */
    uint16_t SP;  /* Stack pointer */
    uint64_t cycle_count;  /* Total cycles executed */
    bool halted;  /* CPU halted flag */
    uint8_t A;
    uint8_t B;
    uint8_t H;
    uint8_t L;
    uint8_t F;
    uint8_t rom_bank;
    uint8_t* rom;
    uint32_t rom_size;
    uint8_t ram[256];
} cpu_t;

typedef struct {
    uint8_t counter;  /* Tmr counter */
    uint8_t enabled;  /* Timer enabled */
} tmr_t;

typedef struct {
    cpu_t cpu;
    tmr_t tmr;
    bool timer_irq_asserted;
} tinyboy_t;

/* Forward declarations */
static void tinyboy_init(tinyboy_t* sys);
static void tinyboy_step(tinyboy_t* sys);
static uint8_t main_read(tinyboy_t* sys, uint16_t addr);
static void main_write(tinyboy_t* sys, uint16_t addr, uint8_t val);
static void cpu_step(tinyboy_t* sys);
static uint8_t mem_read(tinyboy_t* sys, uint16_t addr);
static void mem_write(tinyboy_t* sys, uint16_t addr, uint8_t val);
static uint8_t cpu_read_imm8(tinyboy_t* sys);
static uint16_t cpu_read_imm16(tinyboy_t* sys);
static void cpu_push16(tinyboy_t* sys, uint16_t val);
static uint16_t cpu_pop16(tinyboy_t* sys);
static uint8_t read_imm8(tinyboy_t* sys);
static uint16_t read_imm16(tinyboy_t* sys);
static void push16(tinyboy_t* sys, uint16_t val);
static uint16_t pop16(tinyboy_t* sys);
static uint8_t timer_io_read(tinyboy_t* sys, uint8_t idx);
static void timer_io_write(tinyboy_t* sys, uint8_t idx, uint8_t val);
static uint32_t mapper_resolve_rom_banked(tinyboy_t* sys, uint16_t addr);
static void signal_assert_timer_irq(tinyboy_t* sys);
static void tmr_tick(tinyboy_t* sys, uint32_t cycles);

static inline bool cpu_get_Z(tinyboy_t* sys) { return (sys->cpu.F >> 7) & 1; }
static inline void cpu_set_Z(tinyboy_t* sys, bool val) { if (val) sys->cpu.F |= 0x80; else sys->cpu.F &= ~0x80; }
static inline bool cpu_get_C(tinyboy_t* sys) { return (sys->cpu.F >> 4) & 1; }
static inline void cpu_set_C(tinyboy_t* sys, bool val) { if (val) sys->cpu.F |= 0x10; else sys->cpu.F &= ~0x10; }

static inline uint16_t cpu_get_HL(tinyboy_t* sys) { return ((uint16_t)sys->cpu.H << 8) | sys->cpu.L; }
static inline void cpu_set_HL(tinyboy_t* sys, uint16_t val) { sys->cpu.H = val >> 8; sys->cpu.L = val & 0xFF; }

static uint8_t main_read(tinyboy_t* sys, uint16_t addr) {
    if (addr >= 0x0000 && addr <= 0x3FFF) {
        return sys->cpu.rom[addr - 0x0000 + 0];
    }
    if (addr >= 0x4000 && addr <= 0x7FFF) {
        uint32_t bk = mapper_resolve_rom_banked(sys, addr);
        uint32_t off = bk * 0x4000u + (addr - 0x4000);
        if (sys->cpu.rom_size) off %= sys->cpu.rom_size;
        return sys->cpu.rom ? sys->cpu.rom[off] : 0xFF;
    }
    if (addr >= 0x8000 && addr <= 0x80FF) {
        return sys->cpu.ram[addr - 0x8000 + 0];
    }
    if (addr >= 0xFF00 && addr <= 0xFF01) {
        return timer_io_read(sys, addr - 0xFF00);
    }
    return 0xFF;
}

static void main_write(tinyboy_t* sys, uint16_t addr, uint8_t val) {
    if (addr >= 0x0000 && addr <= 0x7FFF) {
        if (addr >= 0x2000 && addr <= 0x3FFF) {
            uint8_t bank = (val & 15);
            if ((bank == 0)) {
            bank = 1;
            }
            sys->cpu.rom_bank = bank;
            return;
        }
        return;
    }
    if (addr >= 0x0000 && addr <= 0x3FFF) {
        /* read-only bank */
        return;
    }
    if (addr >= 0x4000 && addr <= 0x7FFF) {
        /* read-only bank */
        return;
    }
    if (addr >= 0x8000 && addr <= 0x80FF) {
        sys->cpu.ram[addr - 0x8000 + 0] = val;
        return;
    }
    if (addr >= 0xFF00 && addr <= 0xFF01) {
        timer_io_write(sys, addr - 0xFF00, val);
        return;
    }
}

static uint8_t mem_read(tinyboy_t* sys, uint16_t addr) { return main_read(sys, addr); }
static void mem_write(tinyboy_t* sys, uint16_t addr, uint8_t val) { main_write(sys, addr, val); }
static uint8_t cpu_read_imm8(tinyboy_t* sys) { return mem_read(sys, sys->cpu.PC++); }
static uint16_t cpu_read_imm16(tinyboy_t* sys) {
    uint8_t lo = cpu_read_imm8(sys);
    uint8_t hi = cpu_read_imm8(sys);
    return ((uint16_t)hi << 8) | lo;
}
static void cpu_push16(tinyboy_t* sys, uint16_t val) {
    sys->cpu.SP--; mem_write(sys, sys->cpu.SP, (val >> 8) & 0xFF);
    sys->cpu.SP--; mem_write(sys, sys->cpu.SP, val & 0xFF);
}
static uint16_t cpu_pop16(tinyboy_t* sys) {
    uint8_t lo = mem_read(sys, sys->cpu.SP++);
    uint8_t hi = mem_read(sys, sys->cpu.SP++);
    return ((uint16_t)hi << 8) | lo;
}

static uint8_t read_imm8(tinyboy_t* sys) { return cpu_read_imm8(sys); }
static uint16_t read_imm16(tinyboy_t* sys) { return cpu_read_imm16(sys); }
static void push16(tinyboy_t* sys, uint16_t val) { cpu_push16(sys, val); }
static uint16_t pop16(tinyboy_t* sys) { return cpu_pop16(sys); }

static void signal_assert_timer_irq(tinyboy_t* sys) {
    sys->timer_irq_asserted = true;
    sys->cpu.halted = 0;
}

static uint8_t timer_io_read(tinyboy_t* sys, uint8_t idx) {
    switch (idx) {
        case 0:
            return sys->tmr.counter;
        case 1:
            return sys->tmr.enabled;
        default: return 0xFF;
    }
}

static void timer_io_write(tinyboy_t* sys, uint8_t idx, uint8_t val) {
    switch (idx) {
        case 0:
            sys->tmr.counter = val;
            break;
        case 1:
            sys->tmr.enabled = val;
            break;
    }
}

static uint32_t mapper_resolve_rom_banked(tinyboy_t* sys, uint16_t addr) {
    return sys->cpu.rom_bank;
}

static void cpu_step(tinyboy_t* sys) {
    if (sys->cpu.halted) return;
    uint8_t opcode = mem_read(sys, sys->cpu.PC++);
    switch (opcode) {
        case 0x00: { /* NOP */
            sys->cpu.cycle_count += 4;
            break; }
        case 0x06: { /* LD B,d8 */
            sys->cpu.B = read_imm8(sys);
            sys->cpu.cycle_count += 8;
            break; }
        case 0x21: { /* LD HL,d16 */
            cpu_set_HL(sys, read_imm16(sys));
            sys->cpu.cycle_count += 12;
            break; }
        case 0x31: { /* LD SP,d16 */
            sys->cpu.SP = read_imm16(sys);
            sys->cpu.cycle_count += 12;
            break; }
        case 0x3C: { /* INC A */
            sys->cpu.A = ((sys->cpu.A + 1) & 255);
            cpu_set_Z(sys, (sys->cpu.A == 0));
            sys->cpu.cycle_count += 4;
            break; }
        case 0x3E: { /* LD A,d8 */
            sys->cpu.A = read_imm8(sys);
            sys->cpu.cycle_count += 8;
            break; }
        case 0x47: { /* LD B,A */
            sys->cpu.B = sys->cpu.A;
            sys->cpu.cycle_count += 4;
            break; }
        case 0x76: { /* HALT */
            sys->cpu.halted = 1;
            sys->cpu.cycle_count += 4;
            break; }
        case 0x77: { /* LD (HL),A */
            mem_write(sys, cpu_get_HL(sys), sys->cpu.A);
            sys->cpu.cycle_count += 8;
            break; }
        case 0x78: { /* LD A,B */
            sys->cpu.A = sys->cpu.B;
            sys->cpu.cycle_count += 4;
            break; }
        case 0x7E: { /* LD A,(HL) */
            sys->cpu.A = mem_read(sys, cpu_get_HL(sys));
            sys->cpu.cycle_count += 8;
            break; }
        case 0x80: { /* ADD A,B */
            uint16_t result = (sys->cpu.A + sys->cpu.B);
            cpu_set_C(sys, (result > 255));
            sys->cpu.A = (result & 255);
            cpu_set_Z(sys, (sys->cpu.A == 0));
            sys->cpu.cycle_count += 4;
            break; }
        case 0xC2: { /* JP NZ,d16 */
            uint16_t addr = read_imm16(sys);
            if ((!cpu_get_Z(sys))) {
            sys->cpu.PC = addr;
            }
            sys->cpu.cycle_count += 12;
            break; }
        case 0xC3: { /* JP d16 */
            sys->cpu.PC = read_imm16(sys);
            sys->cpu.cycle_count += 16;
            break; }
        case 0xC6: { /* ADD A,d8 */
            uint8_t val = read_imm8(sys);
            uint16_t result = (sys->cpu.A + val);
            cpu_set_C(sys, (result > 255));
            sys->cpu.A = (result & 255);
            cpu_set_Z(sys, (sys->cpu.A == 0));
            sys->cpu.cycle_count += 8;
            break; }
        case 0xC9: { /* RET */
            sys->cpu.PC = pop16(sys);
            sys->cpu.cycle_count += 16;
            break; }
        case 0xCA: { /* JP Z,d16 */
            uint16_t addr = read_imm16(sys);
            if (cpu_get_Z(sys)) {
            sys->cpu.PC = addr;
            }
            sys->cpu.cycle_count += 12;
            break; }
        case 0xCD: { /* CALL d16 */
            uint16_t addr = read_imm16(sys);
            push16(sys, sys->cpu.PC);
            sys->cpu.PC = addr;
            sys->cpu.cycle_count += 24;
            break; }
        case 0xEA: { /* LD (a16),A */
            uint16_t addr = read_imm16(sys);
            mem_write(sys, addr, sys->cpu.A);
            sys->cpu.cycle_count += 16;
            break; }
        case 0xFA: { /* LD A,(a16) */
            uint16_t addr = read_imm16(sys);
            sys->cpu.A = mem_read(sys, addr);
            sys->cpu.cycle_count += 16;
            break; }
        case 0xFE: { /* CP d8 */
            uint8_t val = read_imm8(sys);
            uint16_t result = ((sys->cpu.A - val) & 255);
            cpu_set_Z(sys, (result == 0));
            cpu_set_C(sys, (sys->cpu.A < val));
            sys->cpu.cycle_count += 8;
            break; }
        default:
            printf("Unknown opcode: 0x%02X at PC=0x%04X\n", opcode, sys->cpu.PC - 1);
            sys->cpu.halted = true; break;
    }
}

static void tmr_tick(tinyboy_t* sys, uint32_t cycles) {
    if (sys->tmr.enabled) {
    uint8_t old = sys->tmr.counter;
    sys->tmr.counter = ((sys->tmr.counter + ((uint8_t)(cycles))) & 255);
    if ((sys->tmr.counter < old)) {
    signal_assert_timer_irq(sys);
    }
    }
}

static void tinyboy_init(tinyboy_t* sys) {
    memset(sys, 0, sizeof(tinyboy_t));
    sys->cpu.rom_bank = 1;
}

static void tinyboy_step(tinyboy_t* sys) {
    uint64_t before = sys->cpu.cycle_count;
    cpu_step(sys);
    uint32_t elapsed = (uint32_t)(sys->cpu.cycle_count - before);
    tmr_tick(sys, elapsed);
}

/* ===== Test program ===== */
int main(void) {
    tinyboy_t sys;
    tinyboy_init(&sys);

    /* Hand-assemble a tiny ROM:
       0x0000: LD SP, 0x80FF    (31 FF 80)
       0x0003: LD A, 0x05       (3E 05)
       0x0005: LD B, 0x03       (06 03)
       0x0007: ADD A, B         (80)
       0x0008: LD (0x8000), A   (EA 00 80)  -- store result in RAM
       0x000B: LD A, 0x02       (3E 02)
       0x000D: LD (0xFF01), A   (EA 01 FF)  -- enable timer
       0x0010: CALL 0x0020      (CD 20 00)  -- call subroutine
       0x0013: LD A, (0x8000)   (FA 00 80)  -- read result back
       0x0016: CP 0x08          (FE 08)     -- compare with 8
       0x0018: JP Z, 0x001C     (CA 1C 00)  -- jump if equal
       0x001B: HALT             (76)
       0x001C: LD A, 0x42       (3E 42)     -- success marker
       0x001E: HALT             (76)
       (gap)
       0x0020: INC A            (3C)        -- subroutine: A++
       0x0021: RET              (C9)

       Bank switch test:
       0x0022: LD A, 0x02       (3E 02)
       0x0024: LD (0x2000), A   (EA 00 20)  -- switch to bank 2
       0x0027: HALT             (76)
    */
    static uint8_t rom[0x8000] = {0};

    /* Main code at bank 0 */
    rom[0x0000] = 0x31; rom[0x0001] = 0xFF; rom[0x0002] = 0x80;  /* LD SP, 0x80FF */
    rom[0x0003] = 0x3E; rom[0x0004] = 0x05;                      /* LD A, 5 */
    rom[0x0005] = 0x06; rom[0x0006] = 0x03;                      /* LD B, 3 */
    rom[0x0007] = 0x80;                                           /* ADD A, B -> A=8 */
    rom[0x0008] = 0xEA; rom[0x0009] = 0x00; rom[0x000A] = 0x80;  /* LD (0x8000), A */
    rom[0x000B] = 0x3E; rom[0x000C] = 0x02;                      /* LD A, 2 */
    rom[0x000D] = 0xEA; rom[0x000E] = 0x01; rom[0x000F] = 0xFF;  /* LD (0xFF01), A -> enable timer */
    rom[0x0010] = 0xCD; rom[0x0011] = 0x20; rom[0x0012] = 0x00;  /* CALL 0x0020 */
    rom[0x0013] = 0xFA; rom[0x0014] = 0x00; rom[0x0015] = 0x80;  /* LD A, (0x8000) -> A=8 */
    rom[0x0016] = 0xFE; rom[0x0017] = 0x08;                      /* CP 8 */
    rom[0x0018] = 0xCA; rom[0x0019] = 0x1C; rom[0x001A] = 0x00;  /* JP Z, 0x001C */
    rom[0x001B] = 0x76;                                           /* HALT (fail) */
    rom[0x001C] = 0x3E; rom[0x001D] = 0x42;                      /* LD A, 0x42 (success!) */
    rom[0x001E] = 0x76;                                           /* HALT */

    /* Subroutine at 0x0020 */
    rom[0x0020] = 0x3C;                                           /* INC A */
    rom[0x0021] = 0xC9;                                           /* RET */

    /* Load ROM into system */
    sys.cpu.rom = rom;
    sys.cpu.rom_size = sizeof(rom);

    printf("=== TinyBoy Test ===\n");

    /* Run until halted */
    int steps = 0;
    while (!sys.cpu.halted && steps < 1000) {
        tinyboy_step(&sys);
        steps++;
    }

    printf("Halted after %d steps\n", steps);
    printf("A = 0x%02X (expected 0x42)\n", sys.cpu.A);
    printf("RAM[0] = 0x%02X (expected 0x08)\n", sys.cpu.ram[0]);
    printf("Tmr counter = %d\n", sys.tmr.counter);
    printf("ROM bank = %d\n", sys.cpu.rom_bank);

    if (sys.cpu.A == 0x42 && sys.cpu.ram[0] == 0x08) {
        printf("\n*** ALL TESTS PASSED ***\n");
        return 0;
    } else {
        printf("\n*** TEST FAILED ***\n");
        return 1;
    }
}