tinysuper.c

/* Generated by proto framework -- Board: TinySuper */
#include <stdio.h>
#include <stdlib.h>
#include <stdint.h>
#include <stdbool.h>
#include <string.h>

typedef struct {
    uint16_t PC;  /* Program counter */
    uint16_t SP;  /* Stack pointer */
    uint64_t cycle_count;  /* Total cycles executed */
    bool halted;  /* CPU halted flag */
    uint8_t A;
    uint8_t B;
    uint8_t F;
    uint8_t* rom;
    uint32_t rom_size;
    uint8_t ram1[256];
} main_t;

typedef struct {
    uint16_t PC;  /* Program counter */
    uint16_t SP;  /* Stack pointer */
    uint64_t cycle_count;  /* Total cycles executed */
    bool halted;  /* CPU halted flag */
    uint8_t A;
    uint8_t B;
    uint8_t F;
    uint8_t aram[256];
} snd_t;

typedef struct {
    main_t main;
    snd_t snd;
    uint8_t comm_a_out[4];
    uint8_t comm_b_out[4];
} tinysuper_t;

/* Forward declarations */
static void tinysuper_init(tinysuper_t* sys);
static void tinysuper_step(tinysuper_t* sys);
static uint8_t bus_a_read(tinysuper_t* sys, uint16_t addr);
static void bus_a_write(tinysuper_t* sys, uint16_t addr, uint8_t val);
static uint8_t bus_b_read(tinysuper_t* sys, uint16_t addr);
static void bus_b_write(tinysuper_t* sys, uint16_t addr, uint8_t val);
static void main_step(tinysuper_t* sys);
static uint8_t main_mem_read(tinysuper_t* sys, uint16_t addr);
static void main_mem_write(tinysuper_t* sys, uint16_t addr, uint8_t val);
static uint8_t main_read_imm8(tinysuper_t* sys);
static uint16_t main_read_imm16(tinysuper_t* sys);
static void main_push16(tinysuper_t* sys, uint16_t val);
static uint16_t main_pop16(tinysuper_t* sys);
static void snd_step(tinysuper_t* sys);
static uint8_t snd_mem_read(tinysuper_t* sys, uint16_t addr);
static void snd_mem_write(tinysuper_t* sys, uint16_t addr, uint8_t val);
static uint8_t snd_read_imm8(tinysuper_t* sys);
static uint16_t snd_read_imm16(tinysuper_t* sys);
static void snd_push16(tinysuper_t* sys, uint16_t val);
static uint16_t snd_pop16(tinysuper_t* sys);

static inline bool main_get_Z(tinysuper_t* sys) { return (sys->main.F >> 7) & 1; }
static inline void main_set_Z(tinysuper_t* sys, bool val) { if (val) sys->main.F |= 0x80; else sys->main.F &= ~0x80; }
static inline bool main_get_C(tinysuper_t* sys) { return (sys->main.F >> 4) & 1; }
static inline void main_set_C(tinysuper_t* sys, bool val) { if (val) sys->main.F |= 0x10; else sys->main.F &= ~0x10; }
static inline bool snd_get_Z(tinysuper_t* sys) { return (sys->snd.F >> 7) & 1; }
static inline void snd_set_Z(tinysuper_t* sys, bool val) { if (val) sys->snd.F |= 0x80; else sys->snd.F &= ~0x80; }
static inline bool snd_get_C(tinysuper_t* sys) { return (sys->snd.F >> 4) & 1; }
static inline void snd_set_C(tinysuper_t* sys, bool val) { if (val) sys->snd.F |= 0x10; else sys->snd.F &= ~0x10; }

static uint8_t bus_a_read(tinysuper_t* sys, uint16_t addr) {
    if (addr >= 0x2100 && addr <= 0x2103) {
        return sys->comm_b_out[addr - 0x2100];
    }
    if (addr >= 0x0000 && addr <= 0x3FFF) {
        return sys->main.rom[addr - 0x0000 + 0];
    }
    if (addr >= 0x8000 && addr <= 0x80FF) {
        return sys->main.ram1[addr - 0x8000 + 0];
    }
    return 0xFF;
}

static void bus_a_write(tinysuper_t* sys, uint16_t addr, uint8_t val) {
    if (addr >= 0x2100 && addr <= 0x2103) {
        sys->comm_a_out[addr - 0x2100] = val;
        return;
    }
    if (addr >= 0x0000 && addr <= 0x3FFF) {
        /* read-only */
        return;
    }
    if (addr >= 0x8000 && addr <= 0x80FF) {
        sys->main.ram1[addr - 0x8000 + 0] = val;
        return;
    }
}

static uint8_t bus_b_read(tinysuper_t* sys, uint16_t addr) {
    if (addr >= 0x00F4 && addr <= 0x00F7) {
        return sys->comm_a_out[addr - 0x00F4];
    }
    if (addr >= 0x0000 && addr <= 0x00FF) {
        return sys->snd.aram[addr - 0x0000 + 0];
    }
    return 0xFF;
}

static void bus_b_write(tinysuper_t* sys, uint16_t addr, uint8_t val) {
    if (addr >= 0x00F4 && addr <= 0x00F7) {
        sys->comm_b_out[addr - 0x00F4] = val;
        return;
    }
    if (addr >= 0x0000 && addr <= 0x00FF) {
        sys->snd.aram[addr - 0x0000 + 0] = val;
        return;
    }
}

static uint8_t main_mem_read(tinysuper_t* sys, uint16_t addr) { return bus_a_read(sys, addr); }
static void main_mem_write(tinysuper_t* sys, uint16_t addr, uint8_t val) { bus_a_write(sys, addr, val); }
static uint8_t main_read_imm8(tinysuper_t* sys) { return main_mem_read(sys, sys->main.PC++); }
static uint16_t main_read_imm16(tinysuper_t* sys) {
    uint8_t lo = main_read_imm8(sys);
    uint8_t hi = main_read_imm8(sys);
    return ((uint16_t)hi << 8) | lo;
}
static void main_push16(tinysuper_t* sys, uint16_t val) {
    sys->main.SP--; main_mem_write(sys, sys->main.SP, (val >> 8) & 0xFF);
    sys->main.SP--; main_mem_write(sys, sys->main.SP, val & 0xFF);
}
static uint16_t main_pop16(tinysuper_t* sys) {
    uint8_t lo = main_mem_read(sys, sys->main.SP++);
    uint8_t hi = main_mem_read(sys, sys->main.SP++);
    return ((uint16_t)hi << 8) | lo;
}

static uint8_t snd_mem_read(tinysuper_t* sys, uint16_t addr) { return bus_b_read(sys, addr); }
static void snd_mem_write(tinysuper_t* sys, uint16_t addr, uint8_t val) { bus_b_write(sys, addr, val); }
static uint8_t snd_read_imm8(tinysuper_t* sys) { return snd_mem_read(sys, sys->snd.PC++); }
static uint16_t snd_read_imm16(tinysuper_t* sys) {
    uint8_t lo = snd_read_imm8(sys);
    uint8_t hi = snd_read_imm8(sys);
    return ((uint16_t)hi << 8) | lo;
}
static void snd_push16(tinysuper_t* sys, uint16_t val) {
    sys->snd.SP--; snd_mem_write(sys, sys->snd.SP, (val >> 8) & 0xFF);
    sys->snd.SP--; snd_mem_write(sys, sys->snd.SP, val & 0xFF);
}
static uint16_t snd_pop16(tinysuper_t* sys) {
    uint8_t lo = snd_mem_read(sys, sys->snd.SP++);
    uint8_t hi = snd_mem_read(sys, sys->snd.SP++);
    return ((uint16_t)hi << 8) | lo;
}

static void main_step(tinysuper_t* sys) {
    if (sys->main.halted) return;
    uint8_t opcode = main_mem_read(sys, sys->main.PC++);
    switch (opcode) {
        case 0x00: { /* NOP */
            sys->main.cycle_count += 4;
            break; }
        case 0x06: { /* LD B,d8 */
            sys->main.B = main_read_imm8(sys);
            sys->main.cycle_count += 8;
            break; }
        case 0x3E: { /* LD A,d8 */
            sys->main.A = main_read_imm8(sys);
            sys->main.cycle_count += 8;
            break; }
        case 0x76: { /* HALT */
            sys->main.halted = 1;
            sys->main.cycle_count += 4;
            break; }
        case 0x78: { /* LD A,B */
            sys->main.A = sys->main.B;
            sys->main.cycle_count += 4;
            break; }
        case 0xC2: { /* JP NZ,d16 */
            uint16_t addr = main_read_imm16(sys);
            if ((!main_get_Z(sys))) {
            sys->main.PC = addr;
            }
            sys->main.cycle_count += 12;
            break; }
        case 0xC3: { /* JP d16 */
            sys->main.PC = main_read_imm16(sys);
            sys->main.cycle_count += 16;
            break; }
        case 0xCA: { /* JP Z,d16 */
            uint16_t addr = main_read_imm16(sys);
            if (main_get_Z(sys)) {
            sys->main.PC = addr;
            }
            sys->main.cycle_count += 12;
            break; }
        case 0xEA: { /* LD (a16),A */
            uint16_t addr = main_read_imm16(sys);
            main_mem_write(sys, addr, sys->main.A);
            sys->main.cycle_count += 16;
            break; }
        case 0xFA: { /* LD A,(a16) */
            uint16_t addr = main_read_imm16(sys);
            sys->main.A = main_mem_read(sys, addr);
            sys->main.cycle_count += 16;
            break; }
        case 0xFE: { /* CP d8 */
            uint8_t val = main_read_imm8(sys);
            uint16_t result = ((sys->main.A - val) & 255);
            main_set_Z(sys, (result == 0));
            sys->main.cycle_count += 8;
            break; }
        default:
            printf("Unknown opcode: 0x%02X at PC=0x%04X\n", opcode, sys->main.PC - 1);
            sys->main.halted = true; break;
    }
}

static void snd_step(tinysuper_t* sys) {
    if (sys->snd.halted) return;
    uint8_t opcode = snd_mem_read(sys, sys->snd.PC++);
    switch (opcode) {
        case 0x00: { /* NOP */
            sys->snd.cycle_count += 4;
            break; }
        case 0x06: { /* LD B,d8 */
            sys->snd.B = snd_read_imm8(sys);
            sys->snd.cycle_count += 8;
            break; }
        case 0x3E: { /* LD A,d8 */
            sys->snd.A = snd_read_imm8(sys);
            sys->snd.cycle_count += 8;
            break; }
        case 0x76: { /* HALT */
            sys->snd.halted = 1;
            sys->snd.cycle_count += 4;
            break; }
        case 0x78: { /* LD A,B */
            sys->snd.A = sys->snd.B;
            sys->snd.cycle_count += 4;
            break; }
        case 0xC2: { /* JP NZ,d16 */
            uint16_t addr = snd_read_imm16(sys);
            if ((!snd_get_Z(sys))) {
            sys->snd.PC = addr;
            }
            sys->snd.cycle_count += 12;
            break; }
        case 0xC3: { /* JP d16 */
            sys->snd.PC = snd_read_imm16(sys);
            sys->snd.cycle_count += 16;
            break; }
        case 0xCA: { /* JP Z,d16 */
            uint16_t addr = snd_read_imm16(sys);
            if (snd_get_Z(sys)) {
            sys->snd.PC = addr;
            }
            sys->snd.cycle_count += 12;
            break; }
        case 0xD0: { /* MUL A,B */
            sys->snd.A = ((sys->snd.A * sys->snd.B) & 255);
            sys->snd.cycle_count += 8;
            break; }
        case 0xEA: { /* LD (a16),A */
            uint16_t addr = snd_read_imm16(sys);
            snd_mem_write(sys, addr, sys->snd.A);
            sys->snd.cycle_count += 16;
            break; }
        case 0xFA: { /* LD A,(a16) */
            uint16_t addr = snd_read_imm16(sys);
            sys->snd.A = snd_mem_read(sys, addr);
            sys->snd.cycle_count += 16;
            break; }
        case 0xFE: { /* CP d8 */
            uint8_t val = snd_read_imm8(sys);
            uint16_t result = ((sys->snd.A - val) & 255);
            snd_set_Z(sys, (result == 0));
            snd_set_C(sys, (sys->snd.A < val));
            sys->snd.cycle_count += 8;
            break; }
        default:
            printf("Unknown opcode: 0x%02X at PC=0x%04X\n", opcode, sys->snd.PC - 1);
            sys->snd.halted = true; break;
    }
}

static void tinysuper_init(tinysuper_t* sys) {
    memset(sys, 0, sizeof(tinysuper_t));
}

static void tinysuper_step(tinysuper_t* sys) {
    uint64_t before = sys->main.cycle_count;
    main_step(sys);
    uint32_t elapsed = (uint32_t)(sys->main.cycle_count - before);
    uint32_t master_elapsed = elapsed * 6;
    { uint32_t cyc = master_elapsed / 21;
      for (uint32_t i = 0; i < cyc; i++) snd_step(sys);
    }
}

/* ===== Test: CPU1 sends data through port, CPU2 computes, sends back ===== */
/*
 * PROTOCOL:
 *   1. CPU1 writes 0x15 to port[0], then 0xAA (sync) to port[2]
 *   2. CPU2 polls port[2] until it sees 0xAA
 *   3. CPU2 reads port[0], doubles it (MUL A,B where B=2), writes to port[0]
 *   4. CPU2 writes 0xBB to port[2] as "done" signal
 *   5. CPU1 polls port[2] until it sees 0xBB
 *   6. CPU1 reads port[0] -> should be 0x2A (42)
 */
int main(void) {
    tinysuper_t sys;
    tinysuper_init(&sys);

    static uint8_t rom1[0x4000] = {0};

    /* CPU1 program:
       0x0000: LD A, 0x15       (3E 15)
       0x0002: LD (0x2100), A   (EA 00 21)  -- port[0] = 0x15
       0x0005: LD A, 0xAA       (3E AA)
       0x0007: LD (0x2102), A   (EA 02 21)  -- port[2] = 0xAA (sync)
       -- poll: wait for CPU2 to signal 0xBB on port[2]
       0x000A: LD A, (0x2102)   (FA 02 21)  -- read port[2] (b_out)
       0x000D: CP 0xBB          (FE BB)
       0x000F: JP NZ, 0x000A    (C2 0A 00)  -- keep polling
       -- read result
       0x0012: LD A, (0x2100)   (FA 00 21)  -- read port[0] (b_out)
       0x0015: LD (0x8000), A   (EA 00 80)  -- store to RAM
       0x0018: HALT             (76)
    */
    rom1[0x0000] = 0x3E; rom1[0x0001] = 0x15;
    rom1[0x0002] = 0xEA; rom1[0x0003] = 0x00; rom1[0x0004] = 0x21;
    rom1[0x0005] = 0x3E; rom1[0x0006] = 0xAA;
    rom1[0x0007] = 0xEA; rom1[0x0008] = 0x02; rom1[0x0009] = 0x21;
    rom1[0x000A] = 0xFA; rom1[0x000B] = 0x02; rom1[0x000C] = 0x21;
    rom1[0x000D] = 0xFE; rom1[0x000E] = 0xBB;
    rom1[0x000F] = 0xC2; rom1[0x0010] = 0x0A; rom1[0x0011] = 0x00;
    rom1[0x0012] = 0xFA; rom1[0x0013] = 0x00; rom1[0x0014] = 0x21;
    rom1[0x0015] = 0xEA; rom1[0x0016] = 0x00; rom1[0x0017] = 0x80;
    rom1[0x0018] = 0x76;

    /* CPU2 program (in ARAM):
       -- poll: wait for CPU1 to write 0xAA on port[2]
       0x0000: LD A, (0x00F6)   (FA F6 00)  -- read port[2] (a_out)
       0x0003: CP 0xAA          (FE AA)
       0x0005: JP NZ, 0x0000    (C2 00 00)  -- keep polling
       -- read, compute, write
       0x0008: LD A, (0x00F4)   (FA F4 00)  -- read port[0] = 0x15
       0x000B: LD B, 0x02       (06 02)     -- B = 2
       0x000D: MUL A,B          (D0)        -- A = 0x15 * 2 = 0x2A
       0x000E: LD (0x00F4), A   (EA F4 00)  -- write result to port[0]
       0x0011: LD A, 0xBB       (3E BB)     -- done marker
       0x0013: LD (0x00F6), A   (EA F6 00)  -- port[2] = 0xBB
       0x0016: HALT             (76)
    */
    sys.snd.aram[0x00] = 0xFA; sys.snd.aram[0x01] = 0xF6; sys.snd.aram[0x02] = 0x00;
    sys.snd.aram[0x03] = 0xFE; sys.snd.aram[0x04] = 0xAA;
    sys.snd.aram[0x05] = 0xC2; sys.snd.aram[0x06] = 0x00; sys.snd.aram[0x07] = 0x00;
    sys.snd.aram[0x08] = 0xFA; sys.snd.aram[0x09] = 0xF4; sys.snd.aram[0x0A] = 0x00;
    sys.snd.aram[0x0B] = 0x06; sys.snd.aram[0x0C] = 0x02;
    sys.snd.aram[0x0D] = 0xD0;
    sys.snd.aram[0x0E] = 0xEA; sys.snd.aram[0x0F] = 0xF4; sys.snd.aram[0x10] = 0x00;
    sys.snd.aram[0x11] = 0x3E; sys.snd.aram[0x12] = 0xBB;
    sys.snd.aram[0x13] = 0xEA; sys.snd.aram[0x14] = 0xF6; sys.snd.aram[0x15] = 0x00;
    sys.snd.aram[0x16] = 0x76;

    /* Load ROM */
    sys.main.rom = rom1;
    sys.main.rom_size = sizeof(rom1);

    printf("=== TinySuper Test ===\n");
    printf("CPU1: 3.5 MHz (master/6), CPU2: 1.0 MHz (master/21)\n");
    printf("Protocol: CPU1 writes 0x15, CPU2 doubles to 0x2A, sends back\n\n");

    int steps = 0;
    while (!sys.main.halted && steps < 100000) {
        tinysuper_step(&sys);
        steps++;
    }

    printf("Halted after %d steps\n", steps);
    printf("CPU1 A    = 0x%02X (expected 0x2A)\n", sys.main.A);
    printf("RAM[0]    = 0x%02X (expected 0x2A)\n", sys.main.ram1[0]);
    printf("CPU2 A    = 0x%02X\n", sys.snd.A);
    printf("CPU2 halt = %d, PC = 0x%04X\n", sys.snd.halted, sys.snd.PC);
    printf("Port A->B = [%02X %02X %02X %02X]\n",
        sys.comm_a_out[0], sys.comm_a_out[1], sys.comm_a_out[2], sys.comm_a_out[3]);
    printf("Port B->A = [%02X %02X %02X %02X]\n",
        sys.comm_b_out[0], sys.comm_b_out[1], sys.comm_b_out[2], sys.comm_b_out[3]);

    if (sys.main.ram1[0] == 0x2A) {
        printf("\n*** DUAL-CPU PORT COMMUNICATION TEST PASSED ***\n");
        printf("Two CPUs on separate buses, different clocks, synced via port!\n");
        return 0;
    } else {
        printf("\n*** TEST FAILED ***\n");
        return 1;
    }
}