cpu-o3: using reverse ordered tick & refactor the stalls logic

Change-Id: Id60cffa77c28f7491c095dca5ff037fdc4542675

Author: tastynoob

src/cpu/o3/comm.hh

@@ -219,29 +219,17 @@ struct TimeStruct
         StallReason blockReason;
     };
 
-    DecodeComm decodeInfo[MaxThreads];
+    DecodeComm decodeInfo[MaxThreads]; // decode to fetch
 
     struct RenameComm
     {
         StallReason blockReason;
     };
 
-    RenameComm renameInfo[MaxThreads];
+    RenameComm renameInfo[MaxThreads]; // rename to decode
 
     struct IewComm
     {
-        // Also eventually include skid buffer space.
-        unsigned freeLQEntries;
-        unsigned freeSQEntries;
-        unsigned dispatchedToLQ;
-        unsigned dispatchedToSQ;
-
-        unsigned ldstqCount;
-
-        unsigned dispatched;
-        bool usedIQ;
-        bool usedLSQ;
-
         StallReason robHeadStallReason;
         StallReason blockReason;
         StallReason lqHeadStallReason;
@@ -256,7 +244,7 @@ struct TimeStruct
         std::vector<ResolvedCFIEntry> resolvedCFIs;  // *F
     };
 
-    IewComm iewInfo[MaxThreads];
+    IewComm iewInfo[MaxThreads]; // iew to rename, fetch
 
     struct CommitComm
     {
@@ -300,13 +288,12 @@ struct TimeStruct
 
         InstSeqNum doneMemSeqNum;
 
+        InstSeqNum robheadNotReadySeqNum;
+
         uint64_t doneFtqId; // F
         uint64_t squashedTargetId; // F
         unsigned squashedLoopIter; // F
 
-        /// Tell Rename how many free entries it has in the ROB
-        unsigned freeROBEntries; // *R
-
         bool isTrapSquash;
         bool squash; // *F, D, R, I
         bool robSquashing; // *F, D, R, I
@@ -336,16 +323,20 @@ struct TimeStruct
 
     };
 
-    CommitComm commitInfo[MaxThreads];
+    CommitComm commitInfo[MaxThreads];// commit to iew, rename, fetch
+};
+
 
-    bool decodeBlock[MaxThreads];
-    bool decodeUnblock[MaxThreads];
-    bool renameBlock[MaxThreads];
-    bool renameUnblock[MaxThreads];
-    bool iewBlock[MaxThreads];
-    bool iewUnblock[MaxThreads];
+struct StallSignals
+{
+
+    bool blockFetch[MaxThreads];// decode to fetch
+    bool blockDecode[MaxThreads];// rename to decode
+    bool blockRename[MaxThreads];// iew to rename (if iew is stalling, rename all threads would be stalled)
+    bool blockIEW[MaxThreads];// commit to iew
 };
 
+
 } // namespace o3
 } // namespace gem5
 

src/cpu/o3/commit.cc

@@ -129,7 +129,7 @@ Commit::Commit(CPU *_cpu, branch_prediction::BPredUnit *_bp, const BaseO3CPUPara
                 "--debug-start=%llu --debug-end=%llu\n",
                 lastCommitCycle, cpu->curCycle(),
                 cpu->cyclesToTicks(Cycles(lastCommitCycle - 200)),
-                cpu->cyclesToTicks(Cycles(lastCommitCycle + 50)));
+                cpu->cyclesToTicks(Cycles(lastCommitCycle + 200)));
         }
         cpu->schedule(this->stuckCheckEvent, cpu->clockEdge(Cycles(40010)));
       }, "CommitStuckCheckEvent"),
@@ -165,7 +165,9 @@ Commit::Commit(CPU *_cpu, branch_prediction::BPredUnit *_bp, const BaseO3CPUPara
         }
     }
 
-    for (ThreadID tid = 0; tid < MaxThreads; tid++) {
+    assert(renameToROBDelay == 1);
+
+    for (ThreadID tid = 0; tid < numThreads; tid++) {
         commitStatus[tid] = Idle;
         changedROBNumEntries[tid] = false;
         trapSquash[tid] = false;
@@ -181,6 +183,7 @@ Commit::Commit(CPU *_cpu, branch_prediction::BPredUnit *_bp, const BaseO3CPUPara
         htmStarts[tid] = 0;
         htmStops[tid] = 0;
         traceCommitIndex[tid] = 0;
+        fixedbuffer[tid] = boost::circular_buffer<DynInstPtr>(renameWidth);
     }
     interrupt = NoFault;
 
@@ -461,7 +464,6 @@ Commit::startupStage()
     // Broadcast the number of free entries.
     for (ThreadID tid = 0; tid < numThreads; tid++) {
         toIEW->commitInfo[tid].usedROB = true;
-        toIEW->commitInfo[tid].freeROBEntries = rob->numFreeEntries(tid);
         toIEW->commitInfo[tid].emptyROB = true;
     }
 
@@ -1104,10 +1106,10 @@ Commit::commit()
         _nextStatus = Active;
     }
 
-    if (num_squashing_threads != numThreads) {
-        // If we're not currently squashing, then get instructions.
-        getInsts();
+    // If we're not currently squashing, then get instructions.
+    moveInstsToBuffer();
 
+    if (num_squashing_threads != numThreads) {
         // Try to commit any instructions.
         commitInsts();
     }
@@ -1120,7 +1122,6 @@ Commit::commit()
 
         if (changedROBNumEntries[tid]) {
             toIEW->commitInfo[tid].usedROB = true;
-            toIEW->commitInfo[tid].freeROBEntries = rob->numFreeEntries(tid);
 
             wroteToTimeBuffer = true;
             changedROBNumEntries[tid] = false;
@@ -1142,7 +1143,6 @@ Commit::commit()
             checkEmptyROB[tid] = false;
             toIEW->commitInfo[tid].usedROB = true;
             toIEW->commitInfo[tid].emptyROB = true;
-            toIEW->commitInfo[tid].freeROBEntries = rob->numFreeEntries(tid);
             wroteToTimeBuffer = true;
         }
 
@@ -1242,7 +1242,9 @@ Commit::commitInsts()
             if (commit_success) {
                 cpu->perfCCT->updateInstPos(head_inst->seqNum, PerfRecord::AtCommit);
                 cpu->perfCCT->commitMeta(head_inst->seqNum);
-                head_inst->printDisassemblyAndResult(cpu->name());
+
+                DPRINTF(CommitTrace, "CT: %s\n", head_inst->genDisassembly());
+
                 if (ismispred) {
                     ismispred = false;
                     stats.recovery_bubble += (cpu->curCycle() - lastCommitCycle) * renameWidth;
@@ -1382,7 +1384,11 @@ Commit::commitInsts()
                 if (head_inst->isLoad()) {
                     Addr load_pc = head_inst->pcState().instAddr();
                     Addr load_addr = head_inst->physEffAddr;
-                    Addr load_value = head_inst->memData ? *((uint64_t *)head_inst->memData) : 0;
+                    char buffer[8] = {0};
+                    if (head_inst->memData) {
+                        std::memcpy(buffer, head_inst->memData, head_inst->effSize);
+                    }
+                    Addr load_value = *((uint64_t *)buffer);
                     bool hit = loadTripleCounter.update(load_pc, load_addr, load_value);
                     if (hit) {
                         // same PC && same addr && same value
@@ -1492,6 +1498,7 @@ Commit::commitInsts()
     for (int tid = 0; tid < MaxThreads; tid++) {
         toIEW->commitInfo[tid].doneMemSeqNum =
             std::max(toIEW->commitInfo[tid].doneSeqNum, rob->getHeadGroupLastDoneSeq(tid));
+        toIEW->commitInfo[tid].robheadNotReadySeqNum = rob->getHeadGroupLastNotReadySeq(tid);
     }
 
     DPRINTF(CommitRate, "%i\n", num_committed);
@@ -1806,16 +1813,54 @@ Commit::commitHead(const DynInstPtr &head_inst, unsigned inst_num)
 }
 
 void
-Commit::getInsts()
+Commit::moveInstsToBuffer()
 {
     DPRINTF(Commit, "Getting instructions from Rename stage.\n");
+    int insts_from_rename = fromRename->size;
+    if (insts_from_rename != 0) {
+        // move to buffer
+        ThreadID tid = fromRename->insts[0]->threadNumber;
+        assert(fixedbuffer[tid].empty());
+        for (int i = 0; i < insts_from_rename; ++i) {
+            const DynInstPtr &inst = fromRename->insts[i];
+            assert(inst->threadNumber == tid);
+            if (localSquashVer.largerThan(inst->getVersion())) {
+                inst->setSquashed();
+            }
+            fixedbuffer[tid].push_back(inst);
+        }
+    }
 
-    // Read any renamed instructions and place them into the ROB.
-    int insts_to_process = std::min((int)renameWidth, fromRename->size);
+    // check threads stall & status
+    ThreadID tid = InvalidThreadID;
+    for (int i = 0; i < numThreads; i++) {
+        bool robblock = commitStatus[i] == ROBSquashing || commitStatus[i] == TrapPending;
+        bool block = (rob->getMaxEntries(i) - rob->getThreadEntries(i) < fixedbuffer[i].size()) || robblock;
+        bool active = !block && !fixedbuffer[i].empty();
+        DPRINTF(Commit, "Thread %i: block %i robblock %i active %i\n", i, block, robblock, active);
+
+        stallSig->blockIEW[i] = block;
+        if (active) {
+            if (tid == InvalidThreadID) tid = i;
+            else {
+                // if there are multiple active threads, must exhaust all threads first
+                // to avoid starvation of other threads and also avoid resource conflict
+                stallSig->blockIEW[tid] = true;
+                stallSig->blockIEW[i] = true;
+                DPRINTF(IEW, "Multiple active threads detected, blocking all threads\n");
+            }
+        }
+    }
+    if (tid == InvalidThreadID) {
+        DPRINTF(Commit, "No instructions from Rename stage.\n");
+        return;
+    }
 
+    // Read any renamed instructions and place them into the ROB.
+    int insts_to_process = fixedbuffer[tid].size();
     for (int inst_num = 0; inst_num < insts_to_process; ++inst_num) {
-        const DynInstPtr &inst = fromRename->insts[inst_num];
-        ThreadID tid = inst->threadNumber;
+        const DynInstPtr &inst = fixedbuffer[tid].front();
+        fixedbuffer[tid].pop_front();
 
         if (localSquashVer.largerThan(inst->getVersion())) {
             inst->setSquashed();
@@ -1840,6 +1885,11 @@ Commit::getInsts()
                     tid, inst->seqNum, inst->pcState());
         }
     }
+
+    if (!fixedbuffer[tid].empty()) {
+        stallSig->blockIEW[tid] = true;
+        DPRINTF(Commit, "Not all instructions from Rename stage could be processed, blocking thread %i\n", tid);
+    }
 }
 
 
@@ -1873,14 +1923,18 @@ Commit::markCompletedInsts()
     for (int inst_num = 0; inst_num < fromIEW->size; ++inst_num) {
         assert(fromIEW->insts[inst_num]);
         if (!fromIEW->insts[inst_num]->isSquashed()) {
-            DPRINTF(Commit, "[tid:%i] Marking PC %s, [sn:%llu] ready "
+            DPRINTF(Commit,
+                    "[tid:%i] Marking PC %s, [sn:%llu] ready "
                     "within ROB.\n",
-                    fromIEW->insts[inst_num]->threadNumber,
-                    fromIEW->insts[inst_num]->pcState(),
+                    fromIEW->insts[inst_num]->threadNumber, fromIEW->insts[inst_num]->pcState(),
                     fromIEW->insts[inst_num]->seqNum);
 
             // Mark the instruction as ready to commit.
             fromIEW->insts[inst_num]->setCanCommit();
+            auto &inst = fromIEW->insts[inst_num];
+
+            panic_if(!rob->findInst(0, inst->seqNum), "[sn:%llu] Committed instruction not found in ROB",
+                     inst->seqNum);
         }
     }
 }
@@ -1901,10 +1955,7 @@ Commit::updateComInstStats(const DynInstPtr &inst)
         cpu->instDone(tid, inst);
     }
 
-    //
     //  Control Instructions
-    //
-    //
     if (inst->isControl()) {
         bool mispred = inst->mispredicted();
         std::unique_ptr<PCStateBase> tmp_next_pc(inst->pcState().clone());

src/cpu/o3/commit.hh

@@ -144,7 +144,7 @@ private:
     uint64_t totalCount = 0;
 };
 
- class Commit
+class Commit
 {
   public:
     /** Overall commit status. Used to determine if the CPU can deschedule
@@ -176,6 +176,10 @@ private:
     /** Per-thread status. */
     ThreadStatus commitStatus[MaxThreads];
 
+    boost::circular_buffer<DynInstPtr> fixedbuffer[MaxThreads];
+
+    StallSignals* stallSig;
+
     bool robSquashHolding{false};
     /** Commit policy used in SMT mode. */
     CommitPolicy commitPolicy;
@@ -234,6 +238,8 @@ private:
 
     void setDecodeStage(Decode *decode_stage);
 
+    void setStallSignals(StallSignals* stall_signals) { stallSig = stall_signals; }
+
     /** The pointer to the IEW stage. Used solely to ensure that
      * various events (traps, interrupts, syscalls) do not occur until
      * all stores have written back.
@@ -373,7 +379,7 @@ private:
     bool commitHead(const DynInstPtr &head_inst, unsigned inst_num);
 
     /** Gets instructions from rename and inserts them into the ROB. */
-    void getInsts();
+    void moveInstsToBuffer();
 
     /** Squash instructions in the rename to ROB TimeBuffer. */
     void squashInflightAndUpdateVersion(ThreadID tid);