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configs: Initialize classic L2 DRRIP slice params [skip ci](#818)
Change-Id: I4973ed1585461ac134fc26ca254bf08ea636405f
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configs/common/CacheConfig.py

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@@ -92,6 +92,10 @@ def config_classic_l2(options, system, l2_cache_class):
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# system.tol2bus_list.append(L2XBar(clk_domain = system.cpu_clk_domain, width=256))
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system.l2_caches[i].cpu_side = system.tol2bus_list[i].mem_side_ports
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system.tol2bus_list[i].snoop_filter.max_capacity = "16MB"
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if isinstance(system.l2_caches[i].replacement_policy, DRRIPRP):
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system.l2_caches[i].replacement_policy.num_slices = 1
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system.l2_caches[i].replacement_policy.num_sets_per_slice = \
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system.l2_caches[i].size // (64 * system.l2_caches[i].assoc)
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system.l2_caches[i].do_fast_writeline = not options.kmh_align
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if options.ideal_cache:
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system.l2_caches[i].response_latency = 0

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