cpu-pred: smt support for decoupled bpu

Author: tastynoob

src/cpu/o3/fetch.cc

@@ -629,8 +629,8 @@ Fetch::processCacheCompletion(PacketPtr pkt)
     }
 
     // Verify fetchBufferPC alignment with the supplying FSQ entry.
-    if (fetchBuffer[tid].valid && dbpbtb->ftqHasHead()) {
-        const auto &stream = dbpbtb->ftqHead();
+    if (fetchBuffer[tid].valid && dbpbtb->ftqHasFetching(0)) {
+        const auto &stream = dbpbtb->ftqFetchingTarget(0);
         if (fetchBuffer[tid].startPC != stream.startPC) {
             panic("fetchBufferPC %#x should be aligned with FSQ startPC %#x",
                   fetchBuffer[tid].startPC, stream.startPC);
@@ -782,8 +782,8 @@ Fetch::lookupAndUpdateNextPC(const DynInstPtr &inst, PCStateBase &next_pc)
     // Decoupled+BTB-only: compute next PC directly from the supplying FSQ entry.
     ThreadID tid = inst->threadNumber;
     assert(dbpbtb);
-    assert(dbpbtb->ftqHasHead());
-    const auto &stream = dbpbtb->ftqHead();
+    assert(dbpbtb->ftqHasFetching(0));
+    const auto &stream = dbpbtb->ftqFetchingTarget(0);
 
     const Addr curr_pc = next_pc.instAddr();
     assert(stream.startPC <= curr_pc && curr_pc < stream.predEndPC);
@@ -1542,11 +1542,11 @@ Fetch::handleIEWSignals()
     if (!resolveQueue.empty()) {
         auto &entry = resolveQueue.front();
         unsigned int stream_id = entry.resolvedFTQId;
-        dbpbtb->prepareResolveUpdateEntries(stream_id);
+        dbpbtb->prepareResolveUpdateEntries(stream_id, 0);
         for (const auto resolvedInstPC : entry.resolvedInstPC) {
-            dbpbtb->markCFIResolved(stream_id, resolvedInstPC);
+            dbpbtb->markCFIResolved(stream_id, resolvedInstPC, 0);
         }
-        bool success = dbpbtb->resolveUpdate(stream_id);
+        bool success = dbpbtb->resolveUpdate(stream_id, 0);
         if (success) {
             dbpbtb->notifyResolveSuccess();
             resolveQueue.pop_front();
@@ -1565,7 +1565,7 @@ Fetch::handleCommitSignals(ThreadID tid)
         if (fromCommit->commitInfo[tid].doneFtqId) {
             DPRINTF(DecoupleBP, "Commit stream Id: %lu\n", fromCommit->commitInfo[tid].doneFtqId);
             assert(dbpbtb);
-            dbpbtb->update(fromCommit->commitInfo[tid].doneFtqId, tid);
+            dbpbtb->commit(fromCommit->commitInfo[tid].doneFtqId, tid);
         }
         return false;
     }
@@ -1700,8 +1700,8 @@ Fetch::buildInst(ThreadID tid, StaticInstPtr staticInst,
             instruction->isMov());
     assert(dbpbtb);
     DPRINTF(DecoupleBP, "Set instruction %lu with fetch id %lu\n",
-            instruction->seqNum, dbpbtb->ftqHeadId());
-    instruction->setFtqId(dbpbtb->ftqHeadId());
+            instruction->seqNum, dbpbtb->ftqHeadId(0));
+    instruction->setFtqId(dbpbtb->ftqHeadId(0));
 
 #if TRACING_ON
     if (trace) {
@@ -1757,7 +1757,7 @@ bool
 Fetch::checkDecoupledFrontend(ThreadID tid)
 {
     assert(dbpbtb);
-    if (!isTraceMode() && !dbpbtb->ftqHasHead()) {
+    if (!isTraceMode() && !dbpbtb->ftqHasFetching(0)) {
         dbpbtb->addFtqNotValid();
         DPRINTF(Fetch, "Skip fetch when FSQ head is not available\n");
         setAllFetchStalls(StallReason::FTQBubble);
@@ -2051,7 +2051,7 @@ Fetch::sendNextCacheRequest(ThreadID tid, const PCStateBase &pc_state) {
     }
 
     assert(dbpbtb);
-    const auto &stream = dbpbtb->ftqHead();
+    const auto &stream = dbpbtb->ftqFetchingTarget(0);
     const Addr start_pc = stream.startPC;
     fetchBuffer[tid].startPC = start_pc;
 

src/cpu/o3/fetch.hh

@@ -968,7 +968,7 @@ class Fetch
 
     // Decoupled+BTB-only: fetch consumes the supplying FSQ entry directly.
     // If no head is available, fetch stalls (no extra "supply" state machine).
-    bool ftqEmpty() const { return !dbpbtb || !dbpbtb->ftqHasHead(); }
+    bool ftqEmpty() const { return !dbpbtb || !dbpbtb->ftqHasFetching(0); }
 
     // Number of dynamic instructions fetched within the current FTQ entry.
     // Used to explicitly notify the BPU when an entry is consumed (Phase5 prep).

src/cpu/o3/trace/TraceFetch.cc

@@ -536,8 +536,8 @@ TraceFetch::chooseWrongPathNopSize(ThreadID tid, Addr pc)
     bool taken = false;
     if (fetch.isBTBPred()) {
         assert(fetch.dbpbtb);
-        if (fetch.dbpbtb->ftqHasHead()) {
-            const auto &stream = fetch.dbpbtb->ftqHead();
+        if (fetch.dbpbtb->ftqHasFetching(tid)) {
+            const auto &stream = fetch.dbpbtb->ftqFetchingTarget(tid);
             block_end = stream.predEndPC;
             taken_pc = stream.predBranchInfo.pc;
             taken = stream.predTaken;

src/cpu/pred/SConscript

@@ -105,6 +105,7 @@ Source('btb/btb_mgsc.cc')
 Source('btb/folded_hist.cc')
 Source('btb/ras.cc')
 Source('btb/btb_ubtb.cc')
+Source('btb/ftq.cc')
 # Source('btb/uras.cc')
 Source('general_arch_db.cc')
 DebugFlag('FreeList')

src/cpu/pred/btb/common.hh

@@ -451,6 +451,7 @@ struct FetchTarget
  */
 struct FullBTBPrediction
 {
+    ThreadID tid;
     Addr bbStart;
     std::vector<BTBEntry> btbEntries; // for BTB, only assigned when hit, sorted by inst order
     // for conditional branch predictors, mapped with lowest bits of branches