cpu-o3: mark resolved info in potential new entries correctly

Change-Id: I95daed85988b0751001fabafe8f30716e82fa3ba

Author: Yakkhini

src/cpu/pred/btb/abtb.cc

@@ -521,6 +521,7 @@ AheadBTB::updateBTBEntry(Addr btb_idx, Addr btb_tag, const BTBEntry& entry, cons
     // if cond entry in btb now, use the one in btb, since we need the up-to-date counter
     // else use the recorded entry
     auto entry_to_write = entry.isCond && found ? BTBEntry(*it) : entry;
+    entry_to_write.resolved = false; // reset resolved bit on update
     entry_to_write.tag = btb_tag;   // update tag after found it!
     // update saturating counter if necessary
     if (entry_to_write.isCond) {

src/cpu/pred/btb/btb_tage.cc

@@ -399,7 +399,6 @@ BTBTAGE::prepareUpdateEntries(const FetchStream &stream) {
         if (!new_entry_taken) {
             potential_new_entry.alwaysTaken = false;
         }
-        potential_new_entry.resolved = true;
         all_entries.push_back(potential_new_entry);
     }
 

src/cpu/pred/btb/decoupled_bpred.cc

@@ -463,6 +463,7 @@ DecoupledBPUWithBTB::handleSquash(unsigned target_id,
     if (squash_type == SQUASH_CTRL && static_inst) {
         // Use full branch info with static_inst if available
         stream.exeBranchInfo = BranchInfo(squash_pc.instAddr(), redirect_pc, static_inst, control_inst_size);
+        stream.exeBranchInfo.resolved = true;
         dumpFsq("Before control squash");
     }
 
@@ -631,6 +632,7 @@ DecoupledBPUWithBTB::resolveUpdate(unsigned &stream_id)
             }
         }
     }
+    stream.exeBranchInfo.resolved = false;
 }
 
 void

src/cpu/pred/btb/mbtb.cc

@@ -435,7 +435,7 @@ MBTB::getAndSetNewBTBEntry(FetchStream &stream)
     // Get prediction metadata from previous stages
     auto meta = std::static_pointer_cast<BTBMeta>(stream.predMetas[getComponentIdx()]);
     auto &predBTBEntries = meta->hit_entries;
-    
+
     // Check if this branch was predicted (exists in BTB)
     bool pred_branch_hit = false;
     BTBEntry entry_to_write = BTBEntry();
@@ -463,6 +463,7 @@ MBTB::getAndSetNewBTBEntry(FetchStream &stream)
         }
         incNonL0Stat(btbStats.newEntry);
         entry_to_write = new_entry;
+        entry_to_write.resolved = stream.exeBranchInfo.resolved;
         is_old_entry = false;
     } else {
         DPRINTF(BTB, "Not creating new entry: pred_branch_hit=%d, stream.exeTaken=%d\n",
@@ -590,6 +591,7 @@ MBTB::buildUpdatedEntry(const BTBEntry& req_entry,
                               ? BTBEntry(*existing_entry)
                               : req_entry;
     entry_to_write.tag = btb_tag;   // update tag
+    entry_to_write.resolved = false; // reset resolved status
 
     // Update saturating counter and alwaysTaken
     if (entry_to_write.isCond) {

src/cpu/pred/btb/stream_struct.hh

@@ -78,27 +78,35 @@ struct BranchInfo
 {
     Addr pc;
     Addr target;
+    // An independent resolved bit to indicate whether CFI is resolved
+    // or not for TAGE training, which is trained in resolve stage so
+    // it's necessary to know whether the branch is resolved and skip
+    // the BTB entry or not.
+    bool resolved;
     bool isCond;
     bool isIndirect;
     bool isCall;
     bool isReturn;
     uint8_t size;
     bool isUncond() const { return !this->isCond; }
     Addr getEnd() { return this->pc + this->size; }
-    BranchInfo() : pc(0), target(0), isCond(false), isIndirect(false), isCall(false), isReturn(false), size(0) {}
+    BranchInfo()
+        : pc(0), target(0), resolved(false), isCond(false), isIndirect(false), isCall(false), isReturn(false), size(0)
+    {
+    }
     // BranchInfo(const Addr &pc, const Addr &target_pc, bool is_cond) :
     // pc(pc), target(target_pc), isCond(is_cond), isIndirect(false), isCall(false), isReturn(false), size(0) {}
-    BranchInfo (const Addr &control_pc,
-                const Addr &target_pc,
-                const StaticInstPtr &static_inst,
-                unsigned size) :
-        pc(control_pc),
-        target(target_pc),
-        isCond(static_inst->isCondCtrl()),
-        isIndirect(static_inst->isIndirectCtrl()),
-        isCall(static_inst->isCall()),
-        isReturn(static_inst->isReturn() && !static_inst->isNonSpeculative() && !static_inst->isDirectCtrl()),
-        size(size) {}
+    BranchInfo(const Addr &control_pc, const Addr &target_pc, const StaticInstPtr &static_inst, unsigned size)
+        : pc(control_pc),
+          target(target_pc),
+          resolved(false),
+          isCond(static_inst->isCondCtrl()),
+          isIndirect(static_inst->isIndirectCtrl()),
+          isCall(static_inst->isCall()),
+          isReturn(static_inst->isReturn() && !static_inst->isNonSpeculative() && !static_inst->isDirectCtrl()),
+          size(size)
+    {
+    }
     int getType() const {
         if (isCond) {
             return BR_COND;
@@ -165,16 +173,11 @@ struct BTBEntry : BranchInfo
 {
     bool valid;
     bool alwaysTaken;
-    // An independent resolved bit to indicate whether CFI is resolved
-    // or not for TAGE training, which is trained in resolve stage so
-    // it's necessary to know whether the branch is resolved and skip
-    // the BTB entry or not.
-    bool resolved;
     int ctr;
     Addr tag;
     // Addr offset; // retrived from lowest bits of pc
-    BTBEntry() : valid(false), alwaysTaken(false), resolved(false), ctr(0), tag(0) {}
-    BTBEntry(const BranchInfo &bi) : BranchInfo(bi), valid(true), alwaysTaken(true), resolved(false), ctr(0) {}
+    BTBEntry() : valid(false), alwaysTaken(false), ctr(0), tag(0) {}
+    BTBEntry(const BranchInfo &bi) : BranchInfo(bi), valid(true), alwaysTaken(true), ctr(0) {}
     BranchInfo getBranchInfo() { return BranchInfo(*this); }
 };