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CJ362ffCao Jiaming
andauthored
Using mbtb basetable align (#672)
* cpu-o3: add statistics for fixed target entries during updates Change-Id: I8c650c9cc5382b16eafce8edd0916a25a60dd688 * cpu-o3: remove unused stats group include Change-Id: I1a0e3993d6f297cf2af6ad8c45ffcef641216dec * cpu-o3: refactor BTB update and add entry preparation method Change-Id: I407ce281dacd047fe9975e6248a4f2a235d198d3 * cpu-o3: update timestamp logic in MBTB lookup Change-Id: I54a18ad85ec12aed564f3a12184c4d1dba244ae4 * cpu-o3: simplify base prediction logic in BTBTAGE Change-Id: Ieb052b87c6479122f89454d1c6f69fa7ef5f6f8c * cpu-o3: update tick handling in MBTB entry update Change-Id: I255b13114d984cf2e53cd003376c76fb93534aa3 * cpu-o3: update tick handling in MBTB entry Change-Id: If352e96f0a50c922a32f6ad41dc871cbc92a14f3 * cpu-o3: replace oldest BTB entry based on branch execution Change-Id: I49a0b5eda44fe0f5355f7177250ae83dc5b61e03 * cpu-o3:update MBTB entry resolution logic in test Change-Id: I2bc707fefe6648874a3c12190e669bd0933c9e7f * cpu-o3: add support for choice MBTB basetable in branch predict Change-Id: Iebed52eb9e3a60ac5ef3bbc0e96095d2d16ef0fa * cpu-o3: simplify tick update logic in MBTB entry handling Change-Id: I310df13c9d1dfeac320c51940c4de486a954ab06 --------- Co-authored-by: Cao Jiaming <caojiaming@bosc.ac.cn>
1 parent 6710787 commit ea20857

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-6
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7 files changed

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src/cpu/pred/BranchPredictor.py

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -985,6 +985,7 @@ class MBTB(TimedBaseBTBPredictor):
985985
blockSize = 32 # max 64 byte block, 32 byte aligned
986986
# MBTB is always half-aligned - no parameter needed
987987
victimCacheSize = Param.Unsigned(0, "Number of entries in the victim cache")
988+
usingMbtbBaseEiterTage = Param.Bool(True, "Whether using MBTB basetable either TAGE ")
988989

989990
class AheadBTB(TimedBaseBTBPredictor):
990991
type = 'AheadBTB'
@@ -1060,6 +1061,7 @@ class BTBTAGE(TimedBaseBTBPredictor):
10601061
numBanks = Param.Unsigned(4, "Number of banks for bank conflict simulation")
10611062
enableBankConflict = Param.Bool(True, "Enable bank conflict simulation")
10621063
numDelay = 2
1064+
usingMbtbBaseEiterTage = Param.Bool(True, "Whether using MBTB basetable either TAGE ")
10631065

10641066
class MicroTAGE(BTBTAGE):
10651067
"""A smaller TAGE predictor configuration to assist uBTB"""

src/cpu/pred/btb/btb_tage.cc

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -91,6 +91,7 @@ indexShift(bankBaseShift + ceilLog2(p.numBanks)),
9191
enableBankConflict(p.enableBankConflict),
9292
lastPredBankId(0),
9393
predBankValid(false),
94+
usingBasetable( !p.usingMbtbBaseEiterTage),
9495
tageStats(this, p.numPredictors, p.numBanks)
9596
{
9697
this->needMoreHistories = p.needMoreHistories;
@@ -269,7 +270,9 @@ BTBTAGE::generateSinglePrediction(const BTBEntry &btb_entry,
269270
// Use base table instead of btb_entry.ctr
270271
Addr base_idx = getBaseTableIndex(startPC);
271272
unsigned branch_idx = getBranchIndexInBlock(btb_entry.pc, startPC);
272-
bool base_taken = getDelay() != 0 ? baseTable[base_idx][branch_idx] >= 0 : btb_entry.ctr >= 0;
273+
bool base_taken = getDelay() != 0 ? (usingBasetable ? baseTable[base_idx][branch_idx] >= 0 : btb_entry.ctr >= 0)
274+
: btb_entry.ctr >= 0;
275+
//bool base_taken = btb_entry.ctr >= 0;
273276
bool alt_pred = alt_provided ? alt_taken : base_taken; // if alt provided, use alt prediction, otherwise use base
274277

275278
// use_alt_on_na gating: when provider weak, consult per-PC counter

src/cpu/pred/btb/btb_tage.hh

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -315,6 +315,7 @@ class BTBTAGE : public TimedBaseBTBPredictor
315315
// Track last prediction bank for conflict detection
316316
unsigned lastPredBankId; // Bank ID of last prediction
317317
bool predBankValid; // Whether lastPredBankId is valid
318+
bool usingBasetable; // Whether using basetable for either MBTB or TAGE
318319

319320
#ifdef UNIT_TEST
320321
typedef uint64_t Scalar;

src/cpu/pred/btb/mbtb.cc

Lines changed: 38 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -81,6 +81,7 @@ MBTB::MBTB(const Params &p)
8181
numEntries(p.numEntries),
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numWays(p.numWays),
8383
tagBits(p.tagBits),
84+
usingBasetable(p.usingMbtbBaseEiterTage),
8485
btbStats(this, p.numWays)
8586
{
8687
// MBTB doesn't support ahead-pipelined stages
@@ -356,7 +357,7 @@ MBTB::lookupSingleBlock(Addr block_pc)
356357
for (auto &way : btb_set) {
357358
if (way.valid && way.tag == current_tag) {
358359
res.push_back(way);
359-
way.tick = curTick(); // Update timestamp for MRU
360+
way.tick = curTick(); // Update timestamp for MRU
360361
std::make_heap(target_mru[btb_idx].begin(), target_mru[btb_idx].end(), older());
361362
}
362363
}
@@ -688,12 +689,44 @@ MBTB::update(const FetchStream &stream)
688689
// 1. Check prediction hit status, for stats recording
689690
checkPredictionHit(stream,
690691
std::static_pointer_cast<BTBMeta>(stream.predMetas[getComponentIdx()]).get());
692+
if (!usingBasetable) {
693+
// only update btb entry for control squash T-> NT or NT -> T
694+
if (stream.squashType == SQUASH_CTRL) {
695+
warn_if(stream.exeBranchInfo.pc > stream.updateEndInstPC, "exeBranchInfo.pc > updateEndInstPC");
696+
updateBTBEntry(stream.exeBranchInfo, stream);
697+
}
698+
}else {
699+
auto entries_need_update = prepareUpdateEntries(stream);
700+
for (auto &entry : entries_need_update) {
701+
updateBTBEntry(entry, stream);
702+
}
703+
}
704+
705+
}
706+
691707

692-
// only update btb entry for control squash T-> NT or NT -> T
693-
if (stream.squashType == SQUASH_CTRL) {
694-
warn_if(stream.exeBranchInfo.pc > stream.updateEndInstPC, "exeBranchInfo.pc > updateEndInstPC");
695-
updateBTBEntry(stream.exeBranchInfo, stream);
708+
std::vector<BTBEntry>
709+
MBTB::prepareUpdateEntries(const FetchStream &stream) {
710+
auto all_entries = stream.updateBTBEntries;
711+
712+
// Add potential new BTB entry if it's a btb miss during prediction
713+
if (!stream.updateIsOldEntry) {
714+
BTBEntry potential_new_entry = stream.updateNewBTBEntry;
715+
bool new_entry_taken = stream.exeTaken && stream.getControlPC() == potential_new_entry.pc;
716+
if (!new_entry_taken) {
717+
potential_new_entry.alwaysTaken = false;
718+
}
719+
all_entries.push_back(potential_new_entry);
696720
}
721+
722+
// Filter: only keep conditional branches that are not always taken
723+
if (getResolvedUpdate()) {
724+
auto remove_it = std::remove_if(all_entries.begin(), all_entries.end(),
725+
[](const BTBEntry &e) { return !e.resolved; });
726+
all_entries.erase(remove_it, all_entries.end());
727+
}
728+
729+
return all_entries;
697730
}
698731

699732
/**

src/cpu/pred/btb/mbtb.hh

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -170,6 +170,8 @@ class MBTB : public TimedBaseBTBPredictor
170170
*/
171171
void update(const FetchStream &stream) override;
172172

173+
std::vector<BTBEntry> prepareUpdateEntries(const FetchStream &stream);
174+
173175
void printBTBEntry(const BTBEntry &e, uint64_t tick = 0) {
174176
DPRINTF(BTB, "BTB entry: valid %d, pc:%#lx, tag: %#lx, size:%d, target:%#lx, \
175177
cond:%d, indirect:%d, call:%d, return:%d, always_taken:%d, tick:%lu\n",
@@ -392,6 +394,7 @@ class MBTB : public TimedBaseBTBPredictor
392394
/** Address calculation masks and shifts */
393395
Addr idxMask; // Mask for extracting index bits
394396
unsigned tagBits; // Number of tag bits
397+
bool usingBasetable; // Whether using basetable for either MBTB or TAGE
395398
Addr tagMask; // Mask for extracting tag bits
396399
unsigned idxShiftAmt; // Amount to shift PC for index
397400
unsigned tagShiftAmt; // Amount to shift PC for tag

src/cpu/pred/btb/stream_struct.hh

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -86,6 +86,7 @@ struct BranchInfo
8686
bool resolved;
8787
bool isCond;
8888
bool isIndirect;
89+
bool isDirect;
8990
bool isCall;
9091
bool isReturn;
9192
uint8_t size;
@@ -103,6 +104,7 @@ struct BranchInfo
103104
resolved(false),
104105
isCond(static_inst->isCondCtrl()),
105106
isIndirect(static_inst->isIndirectCtrl()),
107+
isDirect(static_inst->isDirectCtrl()),
106108
isCall(static_inst->isCall()),
107109
isReturn(static_inst->isReturn() && !static_inst->isNonSpeculative() && !static_inst->isDirectCtrl()),
108110
size(size)

src/cpu/pred/btb/test/btb.test.cc

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -132,6 +132,10 @@ predictUpdateCycle(MBTB* btb,
132132
btb->getAndSetNewBTBEntry(stream);
133133
}
134134

135+
for (auto &entry : stream.updateBTBEntries) {
136+
entry.resolved = true;
137+
}
138+
135139
btb->update(stream);
136140

137141
// Return final predictions after update

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