remove the additional pipline

Author: xiaokamikami

src/test/csrc/fpga/xdma.h

@@ -17,26 +17,21 @@
 #define __XDMA_H__
 
 #include "common.h"
-#include "diffstate.h"
 #include "mpool.h"
 #include <atomic>
 #include <queue>
-#include <signal.h>
 #include <stdbool.h>
 #include <stdio.h>
 #include <stdlib.h>
 #include <sys/shm.h>
 #include <thread>
-#include <unistd.h>
 #include <vector>
 #ifdef FPGA_SIM
 #include "xdma_sim.h"
 #endif // FPGA_SIM
 
-#define HOST_IO_RESET           0x0
-#define HOST_IO_DIFFTEST_ENABLE 0x4
-
 #define DMA_PACKGE_NUM 8
+
 // DMA_PADDING (packge_idx(1) + difftest_data) send width to be calculated by mod up
 #define DMA_PACKGE_LEN     (CONFIG_DIFFTEST_BATCH_BYTELEN + 1)
 #define DMA_PACKGE_ALIGNED ((DMA_PACKGE_LEN + 63) / 64 * 64)
@@ -58,55 +53,36 @@ class FpgaXdma {
 public:
   FpgaXdma();
 
-  void start(bool enable_diff) {
+  void start() {
     running = true;
-    if (enable_diff == false) {
-      static volatile sig_atomic_t signal_received = 0;
-
-      auto handler = [](int sig) {
-        signal_received = sig;
-        printf("\nReceived signal %d, terminating...\n", sig);
-        exit(0);
-      };
-
-      signal(SIGINT, handler);
-      signal(SIGTERM, handler);
-
-      while (signal_received == 0) {
-        usleep(10000);
-      }
-    } else {
 #ifdef USE_THREAD_MEMPOOL
-      std::unique_lock<std::mutex> lock(thread_mtx);
-      start_transmit_thread();
-      while (running) {
-        thread_cv.wait(lock); // wait notify from stop
-      }
-      stop_thansmit_thread();
+    std::unique_lock<std::mutex> lock(thread_mtx);
+    start_transmit_thread();
+    while (running) {
+      thread_cv.wait(lock); // wait notify from stop
+    }
+    stop_thansmit_thread();
 #else
-      read_and_process();
+    read_and_process();
 #endif // USE_THREAD_MEMPOOL
-    }
   }
-
   void stop() {
     running = false;
 #ifdef USE_THREAD_MEMPOOL
     thread_cv.notify_one();
 #endif // USE_THREAD_MEMPOOL
   }
+  void ddr_load_workload(const char *workload) {
+    core_reset();
+    device_write(true, workload, 0, 0);
+    core_restart();
+  }
 
-  void fpga_io(uint64_t address, bool enable) {
+  void fpga_reset_io(bool enable) {
     if (enable)
-      device_write(false, nullptr, address, 0x1);
+      device_write(false, nullptr, 0x0, 0x1);
     else
-      device_write(false, nullptr, address, 0x0);
-  }
-
-  void ddr_load_workload(const char *workload) {
-    fpga_io(HOST_IO_RESET, true);
-    device_write(true, workload, 0, 0);
-    fpga_io(HOST_IO_RESET, false);
+      device_write(false, nullptr, 0x0, 0x0);
   }
 
 private:
@@ -117,6 +93,16 @@ class FpgaXdma {
 #endif
 
   void device_write(bool is_bypass, const char *workload, uint64_t addr, uint64_t value);
+  void core_reset() {
+    device_write(false, nullptr, 0x20000, 0x1);
+    device_write(false, nullptr, 0x100000, 0x1);
+    device_write(false, nullptr, 0x10000, 0x8);
+  }
+
+  void core_restart() {
+    device_write(false, nullptr, 0x20000, 0);
+    device_write(false, nullptr, 0x100000, 0);
+  }
 
 #ifdef USE_THREAD_MEMPOOL
   std::mutex thread_mtx;

src/test/csrc/fpga_sim/xdma_sim.cpp

@@ -136,6 +136,10 @@ int xdma_sim_write(int channel, const char *buf, uint8_t tlast, size_t size) {
   return xsim[channel]->write(buf, tlast, size);
 }
 
+extern "C" unsigned char v_xdma_tready() {
+  return 1;
+}
+
 extern "C" void v_xdma_write(uint8_t channel, const char *axi_tdata, uint8_t axi_tlast) {
   xdma_sim_write(channel, axi_tdata, axi_tlast, 64);
 }