pipxtreme: Updated chconf.h and mcuconf.h, resolve variable conflict between cmsis_system.c and HAL.

Author: glowtape

flight/PiOS/STM32F10x/mcuconf.h

@@ -1,13 +1,46 @@
+/*
+    ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+
+#ifndef MCUCONF_H
+#define MCUCONF_H
+
 #define STM32F103_MCUCONF
 
+/*
+ * HAL driver system settings.
+ */
 #define STM32_NO_INIT                       TRUE
-#define STM32_PVD_ENABLE                    FALSE
-#define STM32_PLS                           STM32_PLS_LEV0
 #define STM32_HSI_ENABLED                   TRUE
 #define STM32_LSI_ENABLED                   TRUE
 #define STM32_HSE_ENABLED                   TRUE
 #define STM32_LSE_ENABLED                   FALSE
 #define STM32_SW                            STM32_SW_PLL
 #define STM32_PLLSRC                        STM32_PLLSRC_HSE
+#define STM32_PLLXTPRE                      STM32_PLLXTPRE_DIV1
 #define STM32_PREDIV_VALUE                  1
 #define STM32_PLLMUL_VALUE                  9
+#define STM32_HPRE                          STM32_HPRE_DIV1
+#define STM32_PPRE1                         STM32_PPRE1_DIV2
+#define STM32_PPRE2                         STM32_PPRE2_DIV2
+#define STM32_ADCPRE                        STM32_ADCPRE_DIV4
+#define STM32_USB_CLOCK_REQUIRED            TRUE
+#define STM32_USBPRE                        STM32_USBPRE_DIV1P5
+#define STM32_MCOSEL                        STM32_MCOSEL_NOCLOCK
+#define STM32_RTCSEL                        STM32_RTCSEL_HSEDIV
+#define STM32_PVD_ENABLE                    FALSE
+#define STM32_PLS                           STM32_PLS_LEV0
+
+#endif // MCUCONF_H

flight/targets/pipxtreme/board-info/cmsis_system.c

@@ -67,6 +67,7 @@
   */
 
 #include "stm32f10x.h"
+#include "pios_config.h"
 
 /**
   * @}
@@ -152,6 +153,10 @@
 /*******************************************************************************
 *  Clock Definitions
 *******************************************************************************/
+#if defined(PIOS_INCLUDE_CHIBIOS)
+  /* ChibiOS supplies and inits this via HAL. */
+  extern uint32_t SystemCoreClock;
+#else
 #ifdef SYSCLK_FREQ_HSE
   uint32_t SystemCoreClock         = SYSCLK_FREQ_HSE;        /*!< System Clock Frequency (Core Clock) */
 #elif defined SYSCLK_FREQ_24MHz
@@ -167,6 +172,7 @@
 #else /*!< HSI Selected as System Clock source */
   uint32_t SystemCoreClock         = HSI_VALUE;        /*!< System Clock Frequency (Core Clock) */
 #endif
+#endif // defined(PIOS_INCLUDE_CHIBIOS)
 
 __I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
 /**