Update to Rust 2024

Author: mciantyre

CHANGELOG.md

@@ -2,6 +2,8 @@
 
 ## [Unreleased]
 
+- Update package to Rust 2024.
+
 ## [0.1.1] 2023-01-12
 
 Fix an incorrect lifetime caught by `implied_bounds_entailment`.

Cargo.toml

@@ -16,6 +16,6 @@ cortex-m = "0.7.2"
 ral-registers = "0.1"
 
 [workspace.package]
-edition = "2021"
+edition = "2024"
 license = "MIT OR Apache-2.0"
 repository = "https://github.com/imxrt-rs/imxrt-dma"

src/channel.rs

@@ -8,9 +8,9 @@
 //! enabled.
 
 use crate::{
-    element::Element,
-    ral::{self, dma, dmamux, tcd::BandwidthControl, Static},
     Error,
+    element::Element,
+    ral::{self, Static, dma, dmamux, tcd::BandwidthControl},
 };
 
 impl<const CHANNELS: usize> super::Dma<CHANNELS> {
@@ -465,10 +465,12 @@ impl Configuration {
 /// Caller must ensure that `hardware_source` is valid for the lifetime of the transfer,
 /// and valid for all subsequent transfers performed by this DMA channel with this address.
 pub unsafe fn set_source_hardware<E: Element>(chan: &mut Channel, hardware_source: *const E) {
-    chan.set_source_address(hardware_source);
-    chan.set_source_offset(0);
-    chan.set_source_attributes::<E>(0);
-    chan.set_source_last_address_adjustment(0);
+    unsafe {
+        chan.set_source_address(hardware_source);
+        chan.set_source_offset(0);
+        chan.set_source_attributes::<E>(0);
+        chan.set_source_last_address_adjustment(0);
+    }
 }
 
 /// Set a hardware peripheral as the destination for a DMA transfer
@@ -485,10 +487,12 @@ pub unsafe fn set_destination_hardware<E: Element>(
     chan: &mut Channel,
     hardware_destination: *const E,
 ) {
-    chan.set_destination_address(hardware_destination);
-    chan.set_destination_offset(0);
-    chan.set_destination_attributes::<E>(0);
-    chan.set_destination_last_address_adjustment(0);
+    unsafe {
+        chan.set_destination_address(hardware_destination);
+        chan.set_destination_offset(0);
+        chan.set_destination_attributes::<E>(0);
+        chan.set_destination_last_address_adjustment(0);
+    }
 }
 
 /// Set a linear buffer as the source for a DMA transfer
@@ -501,10 +505,14 @@ pub unsafe fn set_destination_hardware<E: Element>(
 /// Caller must ensure that the source is valid for the lifetime of the transfer,
 /// and valid for all subsequent transfers performed by this DMA channel with this buffer.
 pub unsafe fn set_source_linear_buffer<E: Element>(chan: &mut Channel, source: &[E]) {
-    chan.set_source_address(source.as_ptr());
-    chan.set_source_offset(core::mem::size_of::<E>() as i16);
-    chan.set_source_attributes::<E>(0);
-    chan.set_source_last_address_adjustment((core::mem::size_of_val(source) as i32).wrapping_neg());
+    unsafe {
+        chan.set_source_address(source.as_ptr());
+        chan.set_source_offset(core::mem::size_of::<E>() as i16);
+        chan.set_source_attributes::<E>(0);
+        chan.set_source_last_address_adjustment(
+            (core::mem::size_of_val(source) as i32).wrapping_neg(),
+        );
+    }
 }
 
 /// Set a linear buffer as the destination for a DMA transfer
@@ -517,12 +525,14 @@ pub unsafe fn set_source_linear_buffer<E: Element>(chan: &mut Channel, source: &
 /// Caller must ensure that the destination is valid for the lifetime of the transfer,
 /// and valid for all subsequent transfers performed by this DMA channel with this buffer.
 pub unsafe fn set_destination_linear_buffer<E: Element>(chan: &mut Channel, destination: &mut [E]) {
-    chan.set_destination_address(destination.as_ptr());
-    chan.set_destination_offset(core::mem::size_of::<E>() as i16);
-    chan.set_destination_attributes::<E>(0);
-    chan.set_destination_last_address_adjustment(
-        (core::mem::size_of_val(destination) as i32).wrapping_neg(),
-    );
+    unsafe {
+        chan.set_destination_address(destination.as_ptr());
+        chan.set_destination_offset(core::mem::size_of::<E>() as i16);
+        chan.set_destination_attributes::<E>(0);
+        chan.set_destination_last_address_adjustment(
+            (core::mem::size_of_val(destination) as i32).wrapping_neg(),
+        );
+    }
 }
 
 /// Assert properties about the circular buffer
@@ -535,7 +545,7 @@ fn circular_buffer_asserts<E>(buffer: &[E]) {
     let start = buffer.as_ptr();
     let size = core::mem::size_of_val(buffer);
     assert!(
-        (start as usize) % size == 0,
+        (start as usize).is_multiple_of(size),
         "DMA circular buffer is not properly aligned"
     );
 }
@@ -565,10 +575,12 @@ pub unsafe fn set_source_circular_buffer<E: Element>(chan: &mut Channel, source:
     circular_buffer_asserts(source);
     let modulo = circular_buffer_modulo(source);
 
-    chan.set_source_address(source.as_ptr());
-    chan.set_source_offset(core::mem::size_of::<E>() as i16);
-    chan.set_source_attributes::<E>(modulo as u8);
-    chan.set_source_last_address_adjustment(0);
+    unsafe {
+        chan.set_source_address(source.as_ptr());
+        chan.set_source_offset(core::mem::size_of::<E>() as i16);
+        chan.set_source_attributes::<E>(modulo as u8);
+        chan.set_source_last_address_adjustment(0);
+    }
 }
 
 /// Set a circular buffer as the destination for a DMA transfer
@@ -594,8 +606,10 @@ pub unsafe fn set_destination_circular_buffer<E: Element>(
     circular_buffer_asserts(destination);
     let modulo = circular_buffer_modulo(destination);
 
-    chan.set_destination_address(destination.as_ptr());
-    chan.set_destination_offset(core::mem::size_of::<E>() as i16);
-    chan.set_destination_attributes::<E>(modulo as u8);
-    chan.set_destination_last_address_adjustment(0);
+    unsafe {
+        chan.set_destination_address(destination.as_ptr());
+        chan.set_destination_offset(core::mem::size_of::<E>() as i16);
+        chan.set_destination_attributes::<E>(modulo as u8);
+        chan.set_destination_last_address_adjustment(0);
+    }
 }

src/error.rs

@@ -105,21 +105,22 @@ impl Debug for Error {
 
 impl Display for Error {
     fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
-        write!(f,
-             "DMA_ES: VLD {vld} ECX {ecx} GPE {gpe} CPE {cpe} ERRCHN {errchn} SAE {sae} SOE {soe} DAE {dae} DOE {doe} NCE {nce} SGE {sge} SBE {sbe} DBE {dbe}",
-             vld = self.is_valid() as u32,
-             ecx = self.is_cancelled() as u32,
-             gpe = self.is_group_priority() as u32,
-             cpe = self.is_channel_priority() as u32,
-             errchn = self.channel_number(),
-             sae = self.is_source_address() as u32,
-             soe = self.is_source_offset() as u32,
-             dae = self.is_destination_address() as u32,
-             doe = self.is_destination_offset() as u32,
-             nce = self.is_loop_configuration() as u32,
-             sge = self.is_scatter_gather() as u32,
-             sbe = self.is_source_bus() as u32,
-             dbe = self.is_destination_bus() as u32,
-         )
+        write!(
+            f,
+            "DMA_ES: VLD {vld} ECX {ecx} GPE {gpe} CPE {cpe} ERRCHN {errchn} SAE {sae} SOE {soe} DAE {dae} DOE {doe} NCE {nce} SGE {sge} SBE {sbe} DBE {dbe}",
+            vld = self.is_valid() as u32,
+            ecx = self.is_cancelled() as u32,
+            gpe = self.is_group_priority() as u32,
+            cpe = self.is_channel_priority() as u32,
+            errchn = self.channel_number(),
+            sae = self.is_source_address() as u32,
+            soe = self.is_source_offset() as u32,
+            dae = self.is_destination_address() as u32,
+            doe = self.is_destination_offset() as u32,
+            nce = self.is_loop_configuration() as u32,
+            sge = self.is_scatter_gather() as u32,
+            sbe = self.is_source_bus() as u32,
+            dbe = self.is_destination_bus() as u32,
+        )
     }
 }

src/interrupt.rs

@@ -1,6 +1,6 @@
 //! DMA interrupt support
 
-use crate::{channel::Channel, Error};
+use crate::{Error, channel::Channel};
 use core::{
     cell::RefCell,
     future::Future,
@@ -48,7 +48,7 @@ impl<const CHANNELS: usize> super::Dma<CHANNELS> {
     /// Panics if `channel` is greater than or equal to the maximum number of channels.
     #[inline(always)]
     pub unsafe fn on_interrupt(&'static self, channel: usize) {
-        let channel = self.channel(channel);
+        let channel = unsafe { self.channel(channel) };
         if channel.is_interrupt() {
             channel.clear_interrupt();
         }

src/lib.rs

@@ -128,4 +128,4 @@ impl<const CHANNELS: usize> Dma<CHANNELS> {
     }
 }
 
-use interrupt::{SharedWaker, NO_WAKER};
+use interrupt::{NO_WAKER, SharedWaker};

src/memcpy.rs

@@ -1,9 +1,9 @@
 //! DMA-powered memcpy
 
 use crate::{
+    Element, Error,
     channel::{self, Channel},
     interrupt::Transfer,
-    Element, Error,
 };
 
 use core::{

src/peripheral.rs

@@ -8,8 +8,8 @@
 //! Otherwise, you can poll the future in a loop.
 
 use super::{
-    channel::{self, Channel, Configuration},
     Element, Error, Transfer,
+    channel::{self, Channel, Configuration},
 };
 
 use core::{

src/ral.rs

@@ -15,8 +15,8 @@ pub mod dma;
 pub mod dmamux;
 pub mod tcd;
 
-pub use ral_registers::{modify_reg, read_reg, write_reg};
 use ral_registers::{RORegister, RWRegister, WORegister};
+pub use ral_registers::{modify_reg, read_reg, write_reg};
 
 //
 // Helper types for static memory

src/ral/dma.rs

@@ -1,6 +1,6 @@
 //! DMA register blocks and fields
 
-use super::{tcd, RORegister, RWRegister, WORegister};
+use super::{RORegister, RWRegister, WORegister, tcd};
 
 use core::ops::Index;