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Commit 6634844

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Sjoerd Meijer
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[ARM][AArch64] Armv8.4-A Enablement
Initial patch adding assembly support for Armv8.4-A. Besides adding v8.4 as a supported architecture to the usual places, this also adds target features for the different crypto algorithms. Armv8.4-A introduced new crypto algorithms, made them optional, and allows different combinations: - none of the v8.4 crypto functions are supported, which is independent of the implementation of the Armv8.0 SHA1 and SHA2 instructions. - the v8.4 SHA512 and SHA3 support is implemented, in this case the Armv8.0 SHA1 and SHA2 instructions must also be implemented. - the v8.4 SM3 and SM4 support is implemented, which is independent of the implementation of the Armv8.0 SHA1 and SHA2 instructions. - all of the v8.4 crypto functions are supported, in this case the Armv8.0 SHA1 and SHA2 instructions must also be implemented. The v8.4 crypto instructions are added to AArch64 only, and not AArch32, and are made optional extensions to Armv8.2-A. The user-facing Clang options will map on these new target features, their naming will be compatible with GCC and added in follow-up patches. The Armv8.4-A instruction sets can be downloaded here: https://developer.arm.com/products/architecture/a-profile/exploration-tools Differential Revision: https://reviews.llvm.org/D48625 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335953 91177308-0d34-0410-b5e6-96231b3b80d8
1 parent 998f860 commit 6634844

12 files changed

Lines changed: 116 additions & 3 deletions

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‎include/llvm/ADT/Triple.h‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -101,6 +101,7 @@ class Triple {
101101
enum SubArchType {
102102
NoSubArch,
103103

104+
ARMSubArch_v8_4a,
104105
ARMSubArch_v8_3a,
105106
ARMSubArch_v8_2a,
106107
ARMSubArch_v8_1a,

‎include/llvm/Support/AArch64TargetParser.def‎

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -35,6 +35,11 @@ AARCH64_ARCH("armv8.3-a", ARMV8_3A, "8.3-A", "v8.3a",
3535
(AArch64::AEK_CRC | AArch64::AEK_CRYPTO | AArch64::AEK_FP |
3636
AArch64::AEK_SIMD | AArch64::AEK_RAS | AArch64::AEK_LSE |
3737
AArch64::AEK_RDM | AArch64::AEK_RCPC))
38+
AARCH64_ARCH("armv8.4-a", ARMV8_4A, "8.4-A", "v8.4a",
39+
ARMBuildAttrs::CPUArch::v8_A, FK_CRYPTO_NEON_FP_ARMV8,
40+
(AArch64::AEK_CRC | AArch64::AEK_CRYPTO | AArch64::AEK_FP |
41+
AArch64::AEK_SIMD | AArch64::AEK_RAS | AArch64::AEK_LSE |
42+
AArch64::AEK_RDM | AArch64::AEK_RCPC))
3843
#undef AARCH64_ARCH
3944

4045
#ifndef AARCH64_ARCH_EXT_NAME
@@ -47,6 +52,10 @@ AARCH64_ARCH_EXT_NAME("crc", AArch64::AEK_CRC, "+crc", "-crc")
4752
AARCH64_ARCH_EXT_NAME("lse", AArch64::AEK_LSE, "+lse", "-lse")
4853
AARCH64_ARCH_EXT_NAME("rdm", AArch64::AEK_RDM, "+rdm", "-rdm")
4954
AARCH64_ARCH_EXT_NAME("crypto", AArch64::AEK_CRYPTO, "+crypto","-crypto")
55+
AARCH64_ARCH_EXT_NAME("sm4", AArch64::AEK_SM4, "+sm4", "-sm4")
56+
AARCH64_ARCH_EXT_NAME("sha3", AArch64::AEK_SHA3, "+sha3", "-sha3")
57+
AARCH64_ARCH_EXT_NAME("sha2", AArch64::AEK_SHA2, "+sha2", "-sha2")
58+
AARCH64_ARCH_EXT_NAME("aes", AArch64::AEK_AES, "+aes", "-aes")
5059
AARCH64_ARCH_EXT_NAME("dotprod", AArch64::AEK_DOTPROD, "+dotprod","-dotprod")
5160
AARCH64_ARCH_EXT_NAME("fp", AArch64::AEK_FP, "+fp-armv8", "-fp-armv8")
5261
AARCH64_ARCH_EXT_NAME("simd", AArch64::AEK_SIMD, "+neon", "-neon")

‎include/llvm/Support/ARMTargetParser.def‎

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -101,6 +101,10 @@ ARM_ARCH("armv8.3-a", ARMV8_3A, "8.3-A", "v8.3a",
101101
ARMBuildAttrs::CPUArch::v8_A, FK_CRYPTO_NEON_FP_ARMV8,
102102
(ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
103103
ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC | ARM::AEK_RAS))
104+
ARM_ARCH("armv8.4-a", ARMV8_4A, "8.4-A", "v8.4a",
105+
ARMBuildAttrs::CPUArch::v8_A, FK_CRYPTO_NEON_FP_ARMV8,
106+
(ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
107+
ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC | ARM::AEK_RAS))
104108
ARM_ARCH("armv8-r", ARMV8R, "8-R", "v8r", ARMBuildAttrs::CPUArch::v8_R,
105109
FK_NEON_FP_ARMV8,
106110
(ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM | ARM::AEK_HWDIVTHUMB |
@@ -130,6 +134,8 @@ ARM_ARCH_EXT_NAME("invalid", ARM::AEK_INVALID, nullptr, nullptr)
130134
ARM_ARCH_EXT_NAME("none", ARM::AEK_NONE, nullptr, nullptr)
131135
ARM_ARCH_EXT_NAME("crc", ARM::AEK_CRC, "+crc", "-crc")
132136
ARM_ARCH_EXT_NAME("crypto", ARM::AEK_CRYPTO, "+crypto","-crypto")
137+
ARM_ARCH_EXT_NAME("sha2", ARM::AEK_SHA2, "+sha2", "-sha2")
138+
ARM_ARCH_EXT_NAME("aes", ARM::AEK_AES, "+aes", "-aes")
133139
ARM_ARCH_EXT_NAME("dotprod", ARM::AEK_DOTPROD, "+dotprod","-dotprod")
134140
ARM_ARCH_EXT_NAME("dsp", ARM::AEK_DSP, "+dsp", "-dsp")
135141
ARM_ARCH_EXT_NAME("fp", ARM::AEK_FP, nullptr, nullptr)

‎include/llvm/Support/TargetParser.h‎

Lines changed: 7 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -86,6 +86,8 @@ enum ArchExtKind : unsigned {
8686
AEK_RAS = 1 << 12,
8787
AEK_SVE = 1 << 13,
8888
AEK_DOTPROD = 1 << 14,
89+
AEK_SHA2 = 1 << 15,
90+
AEK_AES = 1 << 16,
8991
// Unsupported extensions.
9092
AEK_OS = 0x8000000,
9193
AEK_IWMMXT = 0x10000000,
@@ -171,7 +173,11 @@ enum ArchExtKind : unsigned {
171173
AEK_SVE = 1 << 9,
172174
AEK_DOTPROD = 1 << 10,
173175
AEK_RCPC = 1 << 11,
174-
AEK_RDM = 1 << 12
176+
AEK_RDM = 1 << 12,
177+
AEK_SM4 = 1 << 13,
178+
AEK_SHA3 = 1 << 14,
179+
AEK_SHA2 = 1 << 15,
180+
AEK_AES = 1 << 16,
175181
};
176182

177183
StringRef getCanonicalArchName(StringRef Arch);

‎lib/Support/TargetParser.cpp‎

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Original file line numberDiff line numberDiff line change
@@ -480,6 +480,8 @@ bool llvm::AArch64::getArchFeatures(AArch64::ArchKind AK,
480480
Features.push_back("+v8.2a");
481481
if (AK == AArch64::ArchKind::ARMV8_3A)
482482
Features.push_back("+v8.3a");
483+
if (AK == AArch64::ArchKind::ARMV8_4A)
484+
Features.push_back("+v8.4a");
483485

484486
return AK != AArch64::ArchKind::INVALID;
485487
}
@@ -585,6 +587,7 @@ static StringRef getArchSynonym(StringRef Arch) {
585587
.Case("v8.1a", "v8.1-a")
586588
.Case("v8.2a", "v8.2-a")
587589
.Case("v8.3a", "v8.3-a")
590+
.Case("v8.4a", "v8.4-a")
588591
.Case("v8r", "v8-r")
589592
.Case("v8m.base", "v8-m.base")
590593
.Case("v8m.main", "v8-m.main")
@@ -752,6 +755,7 @@ ARM::ProfileKind ARM::parseArchProfile(StringRef Arch) {
752755
case ARM::ArchKind::ARMV8_1A:
753756
case ARM::ArchKind::ARMV8_2A:
754757
case ARM::ArchKind::ARMV8_3A:
758+
case ARM::ArchKind::ARMV8_4A:
755759
return ARM::ProfileKind::A;
756760
case ARM::ArchKind::ARMV2:
757761
case ARM::ArchKind::ARMV2A:
@@ -814,6 +818,7 @@ unsigned llvm::ARM::parseArchVersion(StringRef Arch) {
814818
case ARM::ArchKind::ARMV8_1A:
815819
case ARM::ArchKind::ARMV8_2A:
816820
case ARM::ArchKind::ARMV8_3A:
821+
case ARM::ArchKind::ARMV8_4A:
817822
case ARM::ArchKind::ARMV8R:
818823
case ARM::ArchKind::ARMV8MBaseline:
819824
case ARM::ArchKind::ARMV8MMainline:

‎lib/Support/Triple.cpp‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -590,6 +590,8 @@ static Triple::SubArchType parseSubArch(StringRef SubArchName) {
590590
return Triple::ARMSubArch_v8_2a;
591591
case ARM::ArchKind::ARMV8_3A:
592592
return Triple::ARMSubArch_v8_3a;
593+
case ARM::ArchKind::ARMV8_4A:
594+
return Triple::ARMSubArch_v8_4a;
593595
case ARM::ArchKind::ARMV8R:
594596
return Triple::ARMSubArch_v8r;
595597
case ARM::ArchKind::ARMV8MBaseline:

‎lib/Target/AArch64/AArch64.td‎

Lines changed: 28 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -26,8 +26,32 @@ def FeatureFPARMv8 : SubtargetFeature<"fp-armv8", "HasFPARMv8", "true",
2626
def FeatureNEON : SubtargetFeature<"neon", "HasNEON", "true",
2727
"Enable Advanced SIMD instructions", [FeatureFPARMv8]>;
2828

29+
def FeatureSM4 : SubtargetFeature<
30+
"sm4", "HasSM4", "true",
31+
"Enable SM3 and SM4 support", [FeatureNEON]>;
32+
33+
def FeatureSHA2 : SubtargetFeature<
34+
"sha2", "HasSHA2", "true",
35+
"Enable SHA1 and SHA256 support", [FeatureNEON]>;
36+
37+
def FeatureSHA3 : SubtargetFeature<
38+
"sha3", "HasSHA3", "true",
39+
"Enable SHA512 and SHA3 support", [FeatureNEON, FeatureSHA2]>;
40+
41+
def FeatureAES : SubtargetFeature<
42+
"aes", "HasAES", "true",
43+
"Enable AES support", [FeatureNEON]>;
44+
45+
// Crypto has been split up and any combination is now valid (see the
46+
// crypto defintions above). Also, crypto is now context sensitive:
47+
// it has a different meaning for e.g. Armv8.4 than it has for Armv8.2.
48+
// Therefore, we rely on Clang, the user interacing tool, to pass on the
49+
// appropriate crypto options. But here in the backend, crypto has very little
50+
// meaning anymore. We kept the Crypto defintion here for backward
51+
// compatibility, and now imply features SHA2 and AES, which was the
52+
// "traditional" meaning of Crypto.
2953
def FeatureCrypto : SubtargetFeature<"crypto", "HasCrypto", "true",
30-
"Enable cryptographic instructions", [FeatureNEON]>;
54+
"Enable cryptographic instructions", [FeatureNEON, FeatureSHA2, FeatureAES]>;
3155

3256
def FeatureCRC : SubtargetFeature<"crc", "HasCRC", "true",
3357
"Enable ARMv8 CRC-32 checksum instructions">;
@@ -185,6 +209,9 @@ def HasV8_2aOps : SubtargetFeature<"v8.2a", "HasV8_2aOps", "true",
185209
def HasV8_3aOps : SubtargetFeature<"v8.3a", "HasV8_3aOps", "true",
186210
"Support ARM v8.3a instructions", [HasV8_2aOps, FeatureRCPC]>;
187211

212+
def HasV8_4aOps : SubtargetFeature<"v8.4a", "HasV8_4aOps", "true",
213+
"Support ARM v8.4a instructions", [HasV8_3aOps, FeatureDotProd]>;
214+
188215
//===----------------------------------------------------------------------===//
189216
// Register File Description
190217
//===----------------------------------------------------------------------===//

‎lib/Target/AArch64/AArch64Subtarget.h‎

Lines changed: 14 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -66,6 +66,7 @@ class AArch64Subtarget final : public AArch64GenSubtargetInfo {
6666
bool HasV8_1aOps = false;
6767
bool HasV8_2aOps = false;
6868
bool HasV8_3aOps = false;
69+
bool HasV8_4aOps = false;
6970

7071
bool HasFPARMv8 = false;
7172
bool HasNEON = false;
@@ -78,6 +79,14 @@ class AArch64Subtarget final : public AArch64GenSubtargetInfo {
7879
bool HasPerfMon = false;
7980
bool HasFullFP16 = false;
8081
bool HasSPE = false;
82+
83+
// ARMv8.4 Crypto extensions
84+
bool HasSM4 = true;
85+
bool HasSHA3 = true;
86+
87+
bool HasSHA2 = true;
88+
bool HasAES = true;
89+
8190
bool HasLSLFast = false;
8291
bool HasSVE = false;
8392
bool HasRCPC = false;
@@ -201,6 +210,7 @@ class AArch64Subtarget final : public AArch64GenSubtargetInfo {
201210
bool hasV8_1aOps() const { return HasV8_1aOps; }
202211
bool hasV8_2aOps() const { return HasV8_2aOps; }
203212
bool hasV8_3aOps() const { return HasV8_3aOps; }
213+
bool hasV8_4aOps() const { return HasV8_4aOps; }
204214

205215
bool hasZeroCycleRegMove() const { return HasZeroCycleRegMove; }
206216

@@ -228,6 +238,10 @@ class AArch64Subtarget final : public AArch64GenSubtargetInfo {
228238
bool hasLSE() const { return HasLSE; }
229239
bool hasRAS() const { return HasRAS; }
230240
bool hasRDM() const { return HasRDM; }
241+
bool hasSM4() const { return HasSM4; }
242+
bool hasSHA3() const { return HasSHA3; }
243+
bool hasSHA2() const { return HasSHA2; }
244+
bool hasAES() const { return HasAES; }
231245
bool balanceFPOps() const { return BalanceFPOps; }
232246
bool predictableSelectIsExpensive() const {
233247
return PredictableSelectIsExpensive;

‎lib/Target/ARM/ARM.td‎

Lines changed: 25 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -109,10 +109,16 @@ def Feature8MSecExt : SubtargetFeature<"8msecext", "Has8MSecExt", "true",
109109
"Enable support for ARMv8-M "
110110
"Security Extensions">;
111111

112+
def FeatureSHA2 : SubtargetFeature<"sha2", "HasSHA2", "true",
113+
"Enable SHA1 and SHA256 support", [FeatureNEON]>;
114+
115+
def FeatureAES : SubtargetFeature<"aes", "HasAES", "true",
116+
"Enable AES support", [FeatureNEON]>;
117+
112118
def FeatureCrypto : SubtargetFeature<"crypto", "HasCrypto", "true",
113119
"Enable support for "
114120
"Cryptography extensions",
115-
[FeatureNEON]>;
121+
[FeatureNEON, FeatureSHA2, FeatureAES]>;
116122

117123
def FeatureCRC : SubtargetFeature<"crc", "HasCRC", "true",
118124
"Enable support for CRC instructions">;
@@ -419,6 +425,10 @@ def HasV8_3aOps : SubtargetFeature<"v8.3a", "HasV8_3aOps", "true",
419425
"Support ARM v8.3a instructions",
420426
[HasV8_2aOps]>;
421427

428+
def HasV8_4aOps : SubtargetFeature<"v8.4a", "HasV8_4aOps", "true",
429+
"Support ARM v8.4a instructions",
430+
[HasV8_3aOps, FeatureDotProd]>;
431+
422432
//===----------------------------------------------------------------------===//
423433
// ARM Processor subtarget features.
424434
//
@@ -624,6 +634,20 @@ def ARMv83a : Architecture<"armv8.3-a", "ARMv83a", [HasV8_3aOps,
624634
FeatureCRC,
625635
FeatureRAS]>;
626636

637+
def ARMv84a : Architecture<"armv8.4-a", "ARMv84a", [HasV8_4aOps,
638+
FeatureAClass,
639+
FeatureDB,
640+
FeatureFPARMv8,
641+
FeatureNEON,
642+
FeatureDSP,
643+
FeatureTrustZone,
644+
FeatureMP,
645+
FeatureVirtualization,
646+
FeatureCrypto,
647+
FeatureCRC,
648+
FeatureRAS,
649+
FeatureDotProd]>;
650+
627651
def ARMv8r : Architecture<"armv8-r", "ARMv8r", [HasV8Ops,
628652
FeatureRClass,
629653
FeatureDB,

‎lib/Target/ARM/ARMInstrInfo.td‎

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -253,6 +253,8 @@ def HasV8_2a : Predicate<"Subtarget->hasV8_2aOps()">,
253253
AssemblerPredicate<"HasV8_2aOps", "armv8.2a">;
254254
def HasV8_3a : Predicate<"Subtarget->hasV8_3aOps()">,
255255
AssemblerPredicate<"HasV8_3aOps", "armv8.3a">;
256+
def HasV8_4a : Predicate<"Subtarget->hasV8_4aOps()">,
257+
AssemblerPredicate<"HasV8_4aOps", "armv8.4a">;
256258
def NoVFP : Predicate<"!Subtarget->hasVFP2()">;
257259
def HasVFP2 : Predicate<"Subtarget->hasVFP2()">,
258260
AssemblerPredicate<"FeatureVFP2", "VFP2">;
@@ -267,6 +269,10 @@ def HasFPARMv8 : Predicate<"Subtarget->hasFPARMv8()">,
267269
AssemblerPredicate<"FeatureFPARMv8", "FPARMv8">;
268270
def HasNEON : Predicate<"Subtarget->hasNEON()">,
269271
AssemblerPredicate<"FeatureNEON", "NEON">;
272+
def HasSHA2 : Predicate<"Subtarget->hasSHA2()">,
273+
AssemblerPredicate<"FeatureSHA2", "sha2">;
274+
def HasAES : Predicate<"Subtarget->hasAES()">,
275+
AssemblerPredicate<"FeatureAES", "aes">;
270276
def HasCrypto : Predicate<"Subtarget->hasCrypto()">,
271277
AssemblerPredicate<"FeatureCrypto", "crypto">;
272278
def HasDotProd : Predicate<"Subtarget->hasDotProd()">,

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