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Format comments consistently.
1 parent cec82e6 commit 91ebd7d

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Lines changed: 17 additions & 14 deletions

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nrf-hal-common/src/timer.rs

Lines changed: 17 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -350,13 +350,14 @@ where
350350

351351
/// Implemented by all TIMER* instances.
352352
pub trait Instance: sealed::Sealed {
353-
/// This interrupt associated with this RTC instance.
353+
/// The interrupt associated with this RTC instance.
354354
const INTERRUPT: Interrupt;
355355

356-
/// Return the correct register block
356+
/// Returns the register block for the timer instance.
357357
fn as_timer0(&self) -> &RegBlock0;
358358

359-
/// Starts the timer after clearing the counter register and setting the events compare trigger correctly to the numer of `cycles`
359+
/// Starts the timer after clearing the counter register and setting the events compare trigger
360+
/// correctly to the numer of `cycles`.
360361
fn timer_start<Time>(&self, cycles: Time)
361362
where
362363
Time: Into<u32>,
@@ -391,18 +392,18 @@ pub trait Instance: sealed::Sealed {
391392
self.as_timer0().tasks_start.write(|w| unsafe { w.bits(1) });
392393
}
393394

394-
/// Reset event for CC[0] register
395+
/// Resets event for CC[0] register.
395396
fn timer_reset_event(&self) {
396397
self.as_timer0().events_compare[0].reset();
397398
}
398399

399-
/// Cancel timer by setting it to stop mode and resetting the events
400+
/// Cancels timer by setting it to stop mode and resetting the events.
400401
fn timer_cancel(&self) {
401402
self.as_timer0().tasks_stop.write(|w| unsafe { w.bits(1) });
402403
self.timer_reset_event();
403404
}
404405

405-
/// Checks if the timer is still running which means no event is yet generated for CC[0]
406+
/// Checks if the timer is still running which means no event is yet generated for CC[0].
406407
fn timer_running(&self) -> bool {
407408
self.as_timer0().events_compare[0].read().bits() == 0
408409
}
@@ -412,34 +413,35 @@ pub trait Instance: sealed::Sealed {
412413
self.as_timer0().cc[1].read().bits()
413414
}
414415

415-
/// Disable interrupt for event COMPARE[0] by default
416+
/// Disables interrupt for event COMPARE[0].
416417
fn disable_interrupt(&self) {
417418
self.as_timer0()
418419
.intenclr
419420
.modify(|_, w| w.compare0().clear());
420421
}
421422

422-
/// Enable interrupt for event COMPARE[0] by default
423+
/// Enables interrupt for event COMPARE[0].
423424
fn enable_interrupt(&self) {
424425
self.as_timer0().intenset.modify(|_, w| w.compare0().set());
425426
}
426427

427-
/// Set timer into periodic mode
428+
/// Sets timer into periodic mode.
428429
fn set_shorts_periodic(&self) {
429430
self.as_timer0()
430431
.shorts
431432
.write(|w| w.compare0_clear().enabled().compare0_stop().disabled());
432433
}
433434

434-
/// Set timer into oneshot mode
435+
/// Sets timer into oneshot mode.
435436
fn set_shorts_oneshot(&self) {
436437
self.as_timer0()
437438
.shorts
438439
.write(|w| w.compare0_clear().enabled().compare0_stop().enabled());
439440
}
440441

441-
/// Set up timer for 1 MHz prescaled periods with 32 bits accuracy
442-
/// Only safe to call when the timer is stopped
442+
/// Sets up timer for 1 MHz prescaled periods with 32 bits accuracy.
443+
///
444+
/// This is only safe to call when the timer is stopped.
443445
fn set_periodic(&self) {
444446
self.set_shorts_periodic();
445447
self.as_timer0().prescaler.write(
@@ -448,8 +450,9 @@ pub trait Instance: sealed::Sealed {
448450
self.as_timer0().bitmode.write(|w| w.bitmode()._32bit());
449451
}
450452

451-
/// Set up timer for a 1 MHz prescaled oneshot with 32 bits accuracy
452-
/// Only safe to call when the timer is stopped
453+
/// Sets up timer for a 1 MHz prescaled oneshot with 32 bits accuracy.
454+
///
455+
/// This is only safe to call when the timer is stopped.
453456
fn set_oneshot(&self) {
454457
self.set_shorts_oneshot();
455458
self.as_timer0().prescaler.write(

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