push/pop sections

Setting a section might leave other code in the wrong section. Also
https://doc.rust-lang.org/beta/reference/inline-assembly.html#r-asm.directives.stateful
says we should undo any stateful changes (like changing the section).

Author: thejpster

aarch32-rt/src/arch_v4/abort.rs

@@ -8,7 +8,7 @@ core::arch::global_asm!(
     // Called from the vector table when we have an undefined exception.
     // Saves state and calls a C-compatible handler like
     // `extern "C" fn _data_abort_handler(addr: usize);`
-    .section .text._asm_default_data_abort_handler
+    .pushsection .text._asm_default_data_abort_handler
     .arm
     .global _asm_default_data_abort_handler
     .type _asm_default_data_abort_handler, %function
@@ -36,6 +36,7 @@ core::arch::global_asm!(
         pop     {{ r12 }}                 // restore R12
         movs    pc, lr                    // return from exception
     .size _asm_default_data_abort_handler, . - _asm_default_data_abort_handler
+    .popsection
     "#
 );
 
@@ -47,7 +48,7 @@ core::arch::global_asm!(
     // Called from the vector table when we have a prefetch abort.
     // Saves state and calls a C-compatible handler like
     // `extern "C" fn _prefetch_abort_handler(addr: usize);`
-    .section .text._asm_default_prefetch_abort_handler
+    .pushsection .text._asm_default_prefetch_abort_handler
     .arm
     .global _asm_default_prefetch_abort_handler
     .type _asm_default_prefetch_abort_handler, %function
@@ -75,5 +76,6 @@ core::arch::global_asm!(
         pop     {{ r12 }}                 // restore R12
         movs    pc, lr                    // return from exception
     .size _asm_default_prefetch_abort_handler, . - _asm_default_prefetch_abort_handler
+    .popsection
     "#,
 );

aarch32-rt/src/arch_v4/interrupt.rs

@@ -14,7 +14,7 @@ core::arch::global_asm!(
     //
     // See https://developer.arm.com/documentation/dui0203/j/handling-processor-exceptions/armv6-and-earlier--armv7-a-and-armv7-r-profiles/interrupt-handlers
     // for details on how we need to save LR_irq, SPSR_irq and LR_sys.
-    .section .text._asm_default_irq_handler
+    .pushsection .text._asm_default_irq_handler
     .arm
     .global _asm_default_irq_handler
     .type _asm_default_irq_handler, %function
@@ -43,6 +43,7 @@ core::arch::global_asm!(
         msr     spsr, lr                  //
         ldmfd   sp!, {{ pc }}^            // return from exception (^ => restore SPSR to CPSR)
     .size _asm_default_irq_handler, . - _asm_default_irq_handler
+    .popsection
     "#,
     // sys mode with IRQ masked
     sys_mode = const {

aarch32-rt/src/arch_v4/svc.rs

@@ -9,7 +9,7 @@ core::arch::global_asm!(
     // Called from the vector table when we have an software interrupt.
     // Saves state and calls a C-compatible handler like
     // `extern "C" fn _svc_handler(arg: u32, frame: &Frame) -> u32;`
-    .section .text._asm_default_svc_handler
+    .pushsection .text._asm_default_svc_handler
     .arm
     .global _asm_default_svc_handler
     .type _asm_default_svc_handler, %function
@@ -47,6 +47,7 @@ core::arch::global_asm!(
         msr     spsr, lr                  //
         ldmfd   sp!, {{ r12, pc }}^       // restore R12 and return from exception (^ => restore SPSR to CPSR)
     .size _asm_default_svc_handler, . - _asm_default_svc_handler
+    .popsection
     "#,
     t_bit = const { crate::Cpsr::new_with_raw_value(0).with_t(true).raw_value() },
 );

aarch32-rt/src/arch_v4/undefined.rs

@@ -11,7 +11,7 @@ core::arch::global_asm!(
     // `extern "C" fn _undefined_handler(addr: usize) -> usize;`
     // or
     // `extern "C" fn _undefined_handler(addr: usize) -> !;`
-    .section .text._asm_default_undefined_handler
+    .pushsection .text._asm_default_undefined_handler
     .arm
     .global _asm_default_undefined_handler
     .type _asm_default_undefined_handler, %function
@@ -42,6 +42,7 @@ core::arch::global_asm!(
         pop     {{ r12 }}                 // restore R12
         movs    pc, lr                    // return from exception (movs => restore SPSR to CPSR)
     .size _asm_default_undefined_handler, . - _asm_default_undefined_handler
+    .popsection
     "#,
     t_bit = const { crate::Cpsr::new_with_raw_value(0).with_t(true).raw_value() },
 );

aarch32-rt/src/arch_v7/abort.rs

@@ -9,7 +9,7 @@ core::arch::global_asm!(
     // Called from the vector table when we have an undefined exception.
     // Saves state and calls a C-compatible handler like
     // `extern "C" fn _data_abort_handler(addr: usize);`
-    .section .text._asm_default_data_abort_handler
+    .pushsection .text._asm_default_data_abort_handler
     .arm
     .global _asm_default_data_abort_handler
     .type _asm_default_data_abort_handler, %function
@@ -35,6 +35,7 @@ core::arch::global_asm!(
         str     lr, [sp]                  // overwrite the saved LR with the one from the C handler
         rfefd   sp!                       // return from exception
     .size _asm_default_data_abort_handler, . - _asm_default_data_abort_handler
+    .popsection
     "#,
     abt_mode = const crate::ProcessorMode::Abt as u8,
 );
@@ -47,7 +48,7 @@ core::arch::global_asm!(
     // Called from the vector table when we have a prefetch abort.
     // Saves state and calls a C-compatible handler like
     // `extern "C" fn _prefetch_abort_handler(addr: usize);`
-    .section .text._asm_default_prefetch_abort_handler
+    .pushsection .text._asm_default_prefetch_abort_handler
     .arm
     .global _asm_default_prefetch_abort_handler
     .type _asm_default_prefetch_abort_handler, %function
@@ -73,6 +74,7 @@ core::arch::global_asm!(
         str     lr, [sp]                  // overwrite the saved LR with the one from the C handler
         rfefd   sp!                       // return from exception
     .size _asm_default_prefetch_abort_handler, . - _asm_default_prefetch_abort_handler
+    .popsection
    "#,
     abt_mode = const crate::ProcessorMode::Abt as u8,
 );

aarch32-rt/src/arch_v7/interrupt.rs

@@ -12,7 +12,7 @@ core::arch::global_asm!(
     //
     // See https://developer.arm.com/documentation/dui0203/j/handling-processor-exceptions/armv6-and-earlier--armv7-a-and-armv7-r-profiles/interrupt-handlers
     // for details on how we need to save LR_irq, SPSR_irq and LR_sys.
-    .section .text._asm_default_irq_handler
+    .pushsection .text._asm_default_irq_handler
     .arm
     .global _asm_default_irq_handler
     .type _asm_default_irq_handler, %function
@@ -36,6 +36,7 @@ core::arch::global_asm!(
         pop     {{ lr }}                  // restore adjusted LR
         rfefd   sp!                       // return from exception
     .size _asm_default_irq_handler, . - _asm_default_irq_handler
+    .popsection
     "#,
     sys_mode = const crate::ProcessorMode::Sys as u8,
 );

aarch32-rt/src/arch_v7/svc.rs

@@ -9,7 +9,7 @@ core::arch::global_asm!(
     // Called from the vector table when we have an software interrupt.
     // Saves state and calls a C-compatible handler like
     // `extern "C" fn _svc_handler(arg: u32, frame: &Frame) -> u32;`
-    .section .text._asm_default_svc_handler
+    .pushsection .text._asm_default_svc_handler
     .arm
     .global _asm_default_svc_handler
     .type _asm_default_svc_handler, %function
@@ -41,6 +41,7 @@ core::arch::global_asm!(
         pop     {{ r12, lr }}             // restore R12 and LR
         rfefd   sp!                       // return from exception
     .size _asm_default_svc_handler, . - _asm_default_svc_handler
+    .popsection
     "#,
     svc_mode = const crate::ProcessorMode::Svc as u8,
     t_bit = const { crate::Cpsr::new_with_raw_value(0).with_t(true).raw_value() },

aarch32-rt/src/arch_v7/undefined.rs

@@ -11,7 +11,7 @@ core::arch::global_asm!(
     // `extern "C" fn _undefined_handler(addr: usize) -> usize;`
     // or
     // `extern "C" fn _undefined_handler(addr: usize) -> !;`
-    .section .text._asm_default_undefined_handler
+    .pushsection .text._asm_default_undefined_handler
     .arm
     .global _asm_default_undefined_handler
     .type _asm_default_undefined_handler, %function
@@ -41,6 +41,7 @@ core::arch::global_asm!(
         str     lr, [sp]                  // overwrite the saved LR with the one from the C handler
         rfefd   sp!                       // return from exception
     .size _asm_default_undefined_handler, . - _asm_default_undefined_handler
+    .popsection
     "#,
     und_mode = const crate::ProcessorMode::Und as u8,
     t_bit = const { crate::Cpsr::new_with_raw_value(0).with_t(true).raw_value() },

aarch32-rt/src/lib.rs

@@ -532,7 +532,7 @@ pub extern "C" fn _default_handler() {
 #[cfg(target_arch = "arm")]
 core::arch::global_asm!(
     r#"
-    .section .vector_table,"ax",%progbits
+    .pushsection .vector_table,"ax",%progbits
     .arm
     .global _vector_table
     .type _vector_table, %function
@@ -547,6 +547,7 @@ core::arch::global_asm!(
         ldr     pc, =_asm_irq_handler
         ldr     pc, =_asm_fiq_handler
     .size _vector_table, . - _vector_table
+    .popsection
     "#
 );
 
@@ -699,14 +700,15 @@ macro_rules! restore_fpu_context {
 #[cfg(target_arch = "arm")]
 core::arch::global_asm!(
     r#"
-    .section .text._asm_default_fiq_handler
+    .pushsection .text._asm_default_fiq_handler
 
     // Our default FIQ handler
     .global _asm_default_fiq_handler
     .type _asm_default_fiq_handler, %function
     _asm_default_fiq_handler:
         b       _asm_default_fiq_handler
     .size    _asm_default_fiq_handler, . - _asm_default_fiq_handler
+    .popsection
     "#,
 );
 
@@ -750,7 +752,7 @@ core::arch::global_asm!(
 
     // Configure a stack for every mode. Leaves you in sys mode.
     //
-    .section .text._stack_setup_preallocated
+    .pushsection .text._stack_setup_preallocated
     .global _stack_setup_preallocated
     .type _stack_setup_preallocated, %function
     _stack_setup_preallocated:
@@ -783,9 +785,10 @@ core::arch::global_asm!(
         // return to caller
         bx      r2
     .size _stack_setup_preallocated, . - _stack_setup_preallocated
+    .popsection
 
     // Initialises stacks, .data and .bss
-    .section .text._init_segments
+    .pushsection .text._init_segments
     .arm
     .global _init_segments
     .type _init_segments, %function
@@ -814,6 +817,7 @@ core::arch::global_asm!(
     	// return to caller
         bx      lr
     .size _init_segments, . - _init_segments
+    .popsection
     "#,
     und_mode = const {
         Cpsr::new_with_raw_value(0)
@@ -873,7 +877,7 @@ core::arch::global_asm!(
     // Work around https://github.com/rust-lang/rust/issues/127269
     .fpu vfp2
 
-    .section .text.default_start
+    .pushsection .text.default_start
     .arm
     .global _default_start
     .type _default_start, %function
@@ -904,6 +908,7 @@ core::arch::global_asm!(
         // In case the application returns, loop forever
         b       .
     .size _default_start, . - _default_start
+    .popsection
     "#
 );
 
@@ -919,7 +924,7 @@ core::arch::global_asm!(
     // Work around https://github.com/rust-lang/rust/issues/127269
     .fpu vfp2
 
-    .section .text.default_start
+    .pushsection .text.default_start
     .arm
     .global _default_start
     .type _default_start, %function
@@ -978,6 +983,7 @@ core::arch::global_asm!(
         // In case the application returns, loop forever
         b       .
     .size _default_start, . - _default_start
+    .popsection
     "#,
     cpsr_mode_hyp = const ProcessorMode::Hyp as u8,
     hactlr_bits = const {

examples/mps3-an536/src/bin/el2_hello.rs

@@ -38,8 +38,7 @@ core::arch::global_asm!(
     // Work around https://github.com/rust-lang/rust/issues/127269
     .fpu vfp3-d16
 
-    .section .text.start
-
+    .pushsection .text.start
     .global _start
     .type _start, %function
     _start:
@@ -81,6 +80,7 @@ core::arch::global_asm!(
         // In case the application returns, loop forever
         b       .
     .size _start, . - _start
+    .popsection
     "#,
     hactlr_bits = const {
         Hactlr::new_with_raw_value(0)