Fix Icarus Verilog compat: use always_comb for unpacked array init

  Icarus treats unpacked array elements as reg types and rejects
  continuous assignment to them. Replace assign statements driving
  index [0] of pipeline arrays with always_comb blocks in fp_divider
  and fp_sqrt.

Author: adambagley

hw/rtl/cpu_and_mem/cpu/ex_stage/fpu/fp_divider.sv

@@ -410,17 +410,19 @@ module fp_divider #(
   logic                         div_special_div_zero[DivCycles+1];
   logic        [           2:0] div_rm              [DivCycles+1];
 
-  // Connect stage 3 output to divide pipeline input
-  assign div_quotient[0]         = s3_quotient;
-  assign div_remainder[0]        = s3_remainder;
-  assign div_divisor[0]          = s3_divisor;
-  assign div_result_exp[0]       = s3_result_exp;
-  assign div_result_sign[0]      = s3_result_sign;
-  assign div_is_special[0]       = s3_is_special;
-  assign div_special_result[0]   = s3_special_result;
-  assign div_special_invalid[0]  = s3_special_invalid;
-  assign div_special_div_zero[0] = s3_special_div_zero;
-  assign div_rm[0]               = s3_rm;
+  // Connect stage 3 output to divide pipeline input (always_comb for Icarus compat)
+  always_comb begin
+    div_quotient[0]         = s3_quotient;
+    div_remainder[0]        = s3_remainder;
+    div_divisor[0]          = s3_divisor;
+    div_result_exp[0]       = s3_result_exp;
+    div_result_sign[0]      = s3_result_sign;
+    div_is_special[0]       = s3_is_special;
+    div_special_result[0]   = s3_special_result;
+    div_special_invalid[0]  = s3_special_invalid;
+    div_special_div_zero[0] = s3_special_div_zero;
+    div_rm[0]               = s3_rm;
+  end
 
   // Generate block: one radix-2 division step per stage
   for (genvar g = 0; g < DivCycles; g++) begin : gen_div

hw/rtl/cpu_and_mem/cpu/ex_stage/fpu/fp_sqrt.sv

@@ -287,15 +287,17 @@ module fp_sqrt #(
   logic                           comp_special_invalid[RootBits+1];
   logic        [             2:0] comp_rm             [RootBits+1];
 
-  // Connect stage 2 output to compute pipeline input
-  assign comp_root[0]            = s2_root;
-  assign comp_remainder[0]       = s2_remainder;
-  assign comp_radicand[0]        = s2_radicand;
-  assign comp_result_exp[0]      = s2_result_exp;
-  assign comp_is_special[0]      = s2_is_special;
-  assign comp_special_result[0]  = s2_special_result;
-  assign comp_special_invalid[0] = s2_special_invalid;
-  assign comp_rm[0]              = s2_rm;
+  // Connect stage 2 output to compute pipeline input (always_comb for Icarus compat)
+  always_comb begin
+    comp_root[0]            = s2_root;
+    comp_remainder[0]       = s2_remainder;
+    comp_radicand[0]        = s2_radicand;
+    comp_result_exp[0]      = s2_result_exp;
+    comp_is_special[0]      = s2_is_special;
+    comp_special_result[0]  = s2_special_result;
+    comp_special_invalid[0] = s2_special_invalid;
+    comp_rm[0]              = s2_rm;
+  end
 
   // Generate block: one digit-recurrence step per stage
   for (genvar g = 0; g < RootBits; g++) begin : gen_sqrt