zephyr/boards/arm/elite_pi_rp2040/elite_pi_rp2040.dts at 144a121366ae1d120628ca10c7cd133f7ec3372d · zmkfirmware/zephyr · GitHub

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/*
 * Copyright (c) 2021 Yonatan Schachter
 *
 * SPDX-License-Identifier: Apache-2.0
 */

/dts-v1/;

#include <rpi_pico/rp2040.dtsi>
#include "elite_pi_rp2040-pinctrl.dtsi"
#include "elite_pirp2040.dtsi"
#include <freq.h>

/ {
	chosen {
		zephyr,sram = &sram0;
		zephyr,flash = &flash0;
		zephyr,console = &uart0;
		zephyr,code-partition = &code_partition;
	};

	xtal_clk: xtal-clk {
		compatible = "fixed-clock";
		clock-frequency = <12000000>;
		#clock-cells = <0>;
	};
};

&flash0 {
	/* 16MB of flash minus the 0x100 used for
	 * the second stage bootloader
	 */
	reg = <0x10000000 DT_SIZE_M(16)>;

	partitions {
		compatible = "fixed-partitions";
		#address-cells = <1>;
		#size-cells = <1>;

		/* Reserved memory for the second stage bootloader */
		second_stage_bootloader: partition@0 {
			label = "second_stage_bootloader";
			reg = <0x00000000 0x100>;
			read-only;
		};


		/*
		 * Usable flash. Starts at 0x100, after the bootloader. The partition
		 * size is 16MB minus the 0x100 bytes taken by the bootloader.
		 */
		code_partition: partition@100 {
			label = "code-partition";
			reg = <0x100 (DT_SIZE_M(16) - 0x100)>;
			read-only;
		};
	};
};


&uart0 {
	current-speed = <115200>;
	status = "okay";
	pinctrl-0 = <&uart0_default>;
	pinctrl-names = "default";
};

&i2c1 {
	status = "okay";
	pinctrl-0 = <&i2c1_default>;
	pinctrl-names = "default";
	clock-frequency = <I2C_BITRATE_FAST>;
};

&spi0 {
	status = "okay";
	pinctrl-0 = <&spi0_default>;
	pinctrl-names = "default";
	clock-frequency = <DT_FREQ_M(2)>;
};

&gpio0 {
	status = "okay";
};

zephyr_udc0: &usbd {
	status = "okay";
};