mem: Add 8 channel ddr profiling (#703)

Change-Id: I2d3263ada2a0ee6744c4bbf387a1e6a2d9c06f69

Author: Ergou-ren

.github/workflows/autotest/gem5-vec.cfg

@@ -43,7 +43,7 @@ fs_path = ./configs/example/kmhv2.py --enable-riscv-vector --restore-rvv-cpt
 task ={set_env} && ./build/RISCV/gem5.opt \
     --outdir=$sublog$ \
     {fs_path} \
-	--dramsim3-ini=./ext/dramsim3/xiangshan_configs/xiangshan_DDR4_8Gb_x8_3200_2ch.ini \
+	--dramsim3-ini=./ext/dramsim3/xiangshan_configs/xiangshan_DDR4_8Gb_x8_3200_8ch.ini \
 	--raw-cpt --generic-rv-cpt=$binfile$ 
 post-task = 
 except-task = echo gem5 running error!

.github/workflows/autotest/gem5.cfg

@@ -186,7 +186,7 @@ task = {set_var} && \
     --l2-to-l3-pf-hint \
     --l3-hwp-type=WorkerPrefetcher \
     --mem-type=DRAMsim3 \
-    --dramsim3-ini=./ext/dramsim3/xiangshan_configs/xiangshan_DDR4_8Gb_x8_3200_2ch.ini \
+    --dramsim3-ini=./ext/dramsim3/xiangshan_configs/xiangshan_DDR4_8Gb_x8_3200_8ch.ini \
     --generic-rv-cpt=$binfile$ \
     --gcpt-restorer={gcpt_path} \
     --bp-type=DecoupledBPUWithFTB --enable-loop-predictor --enable-jump-ahead-predictor \

configs/common/xiangshan.py

@@ -171,7 +171,7 @@ def config_xiangshan_inputs(args: argparse.Namespace, sys):
     if args.mem_type == 'DRAMsim3' and args.dramsim3_ini is None:
         # use relative path to find the dramsim3 ini file, from configs/common/ to root
         root_dir = os.path.dirname(os.path.dirname(os.path.dirname(__file__)))
-        args.dramsim3_ini = os.path.join(root_dir, 'ext/dramsim3/xiangshan_configs/xiangshan_DDR4_8Gb_x8_3200_2ch.ini')
+        args.dramsim3_ini = os.path.join(root_dir, 'ext/dramsim3/xiangshan_configs/xiangshan_DDR4_8Gb_x8_3200_8ch.ini')
 
     if args.mem_type == 'Ramulator2' and args.ramulator2_ini is None:
         # use relative path to find the ramulator ini file, from configs/common/ to root

configs/example/se.py

@@ -162,7 +162,7 @@ def setDefaultArgs(args):
     # Set dramsim3_ini path
     if not hasattr(args, 'dramsim3_ini') or args.dramsim3_ini is None:
         root_dir = os.path.dirname(os.path.dirname(os.path.dirname(__file__)))
-        args.dramsim3_ini = os.path.join(root_dir, 'ext/dramsim3/xiangshan_configs/xiangshan_DDR4_8Gb_x8_3200_2ch.ini')
+        args.dramsim3_ini = os.path.join(root_dir, 'ext/dramsim3/xiangshan_configs/xiangshan_DDR4_8Gb_x8_3200_8ch.ini')
 
 args = parser.parse_args()
 

ext/dramsim3/xiangshan_configs/xiangshan_DDR4_8Gb_x8_3200_8ch.ini

@@ -0,0 +1,67 @@
+[dram_structure]
+protocol = DDR4
+bankgroups = 4
+banks_per_group = 4
+rows = 65536
+columns = 1024
+device_width = 8
+BL = 8
+
+[timing]
+tCK = 0.63
+AL = 0
+CL = 16
+CWL = 16
+tRCD = 18
+tRP = 18
+tRAS = 52
+tRFC = 560
+tRFC2 = 416
+tRFC4 = 256
+tREFI = 12480
+tRPRE = 1
+tWPRE = 1
+tRRD_S = 4
+tRRD_L = 8
+tWTR_S = 4
+tWTR_L = 12
+tFAW = 34
+tWR = 24
+tWR2 = 25
+tRTP = 12
+tCCD_S = 4
+tCCD_L = 8
+tCKE = 8
+tCKESR = 9
+tXS = 576
+tXP = 10
+tRTRS = 1
+
+[power]
+VDD = 1.2
+IDD0 = 57
+IPP0 = 3.0
+IDD2P = 25
+IDD2N = 37
+IDD3P = 43
+IDD3N = 52
+IDD4W = 150
+IDD4R = 168
+IDD5AB = 250
+IDD6x = 30
+
+[system]
+channel_size = 16384
+channels = 8
+bus_width = 64
+address_mapping = roracobabgch
+queue_structure = PER_BANK
+refresh_policy = RANK_LEVEL_STAGGERED
+row_buf_policy = OPEN_PAGE
+cmd_queue_size = 8
+trans_queue_size = 32
+
+[other]
+epoch_period = 1587301
+output_level = 1
+

util/memory_check/run-xs-with-valgrind.sh

@@ -22,7 +22,7 @@ valgrind -s --track-origins=yes --log-file=valgrind-out.txt --error-limit=no \
     --l2-wrapper-hwp-type=CompositeWithWorkerPrefetcher \
     --l2-to-l3-pf-hint --l3-hwp-type=WorkerPrefetcher \
     --mem-type=DRAMsim3 \
-    --dramsim3-ini=$gem5_home/ext/dramsim3/xiangshan_configs/xiangshan_DDR4_8Gb_x8_3200_2ch.ini \
+    --dramsim3-ini=$gem5_home/ext/dramsim3/xiangshan_configs/xiangshan_DDR4_8Gb_x8_3200_8ch.ini \
     --bp-type=DecoupledBPUWithFTB --enable-loop-predictor \
     --enable-difftest --difftest-ref-so=$ref_so_path \
     --generic-rv-cpt=$test_cpt \

util/pgo/basic_pgo.sh

@@ -63,7 +63,7 @@ $gem5_home/build/RISCV/gem5.opt \
  --l1-to-l2-pf-hint --l2-hwp-type=WorkerPrefetcher \
  --l2-to-l3-pf-hint --l3-hwp-type=WorkerPrefetcher \
  --mem-type=DRAMsim3 \
- --dramsim3-ini=$gem5_home/ext/dramsim3/xiangshan_configs/xiangshan_DDR4_8Gb_x8_3200_2ch.ini \
+ --dramsim3-ini=$gem5_home/ext/dramsim3/xiangshan_configs/xiangshan_DDR4_8Gb_x8_3200_8ch.ini \
  --bp-type=DecoupledBPUWithFTB --enable-loop-predictor \
  --generic-rv-cpt=$GEM5_PGO_CPT \
  --gcpt-restorer=$GCPT_RESTORER \

util/runse.sh

@@ -22,7 +22,7 @@ WORKLOAD_PATH=$1
     --l2-to-l3-pf-hint \
     --l3-hwp-type=WorkerPrefetcher \
     --mem-type=DRAMsim3 \
-    --dramsim3-ini=./ext/dramsim3/xiangshan_configs/xiangshan_DDR4_8Gb_x8_3200_2ch.ini \
+    --dramsim3-ini=./ext/dramsim3/xiangshan_configs/xiangshan_DDR4_8Gb_x8_3200_8ch.ini \
     --bp-type=DecoupledBPUWithFTB \
     --enable-loop-predictor \
     --enable-jump-ahead-predictor \