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cpu-o3: rename execWB to toCommit wire for instruction squashing#678

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jensen-yan merged 2 commits intoxs-devfrom
rename-toCommit-align
Dec 26, 2025
Merged

cpu-o3: rename execWB to toCommit wire for instruction squashing#678
jensen-yan merged 2 commits intoxs-devfrom
rename-toCommit-align

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@jensen-yan jensen-yan commented Dec 25, 2025

  • delete old toCommit and execBypass
  • Updated the IEW class to replace execWB with toCommit for handling instruction squashing and commit signals.
  • Enhanced comments to clarify the purpose of the toCommit wire and its zero-cycle latency communication with Commit.

Change-Id: I43ab0206c70ea3d7152a40bd8f589dc8de164cc9

Summary by CodeRabbit

  • Refactor

    • Consolidated internal communication between execution and commit stages, centralizing commit signaling and streamlining data flow while preserving functionality and behavior.
  • Chores

    • Removed the separate execute-to-writeback delay configuration, simplifying delay parameters and clarifying zero-latency semantics between execution and commit.

✏️ Tip: You can customize this high-level summary in your review settings.

- delete old toCommit and execBypass
- Updated the IEW class to replace execWB with toCommit for handling instruction squashing and commit signals.
- Enhanced comments to clarify the purpose of the toCommit wire and its zero-cycle latency communication with Commit.

Change-Id: I43ab0206c70ea3d7152a40bd8f589dc8de164cc9
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coderabbitai bot commented Dec 25, 2025

📝 Walkthrough

Walkthrough

Consolidates IEW→Commit signaling by replacing execWB/related wires with a single toCommit wire and a dedicated iewToCommitDelay delay. Updated IEW logic to read/write commit-related fields from toCommit, adjusting misprediction, squash, and writeback paths accordingly.

Changes

Cohort / File(s) Summary
Commit path wiring
src/cpu/o3/iew.cc
Replaced execWB references with toCommit, updated writeback/mispredict/squash checks to use toCommit->*, adjusted DPRINTF outputs, and routed commit signals through toCommit with iewToCommitDelay.
Header / wire cleanup
src/cpu/o3/iew.hh
Removed execBypass, execWB, and wbDelay; added iewToCommitDelay (Cycles) and updated private wire declarations to reflect consolidated toCommit signaling.
CPU parameter removal
src/cpu/o3/BaseO3CPU.py
Removed public parameter executeToWriteBackDelay from BaseO3CPU (execute-to-writeback delay eliminated).

Sequence Diagram(s)

sequenceDiagram
    %%{init: {"themeVariables": {"primaryColor":"#9ad3bc","secondaryColor":"#f7f3d7","actorBorder":"#6a9fb5"}}}%%
    participant Exec as Execute
    participant IEW as IEW
    participant Commit as Commit
    note over IEW,Commit: toCommit wire (iewToCommitDelay)
    Exec->>IEW: completed instruction (+ signals)
    IEW->>IEW: populate toCommit fields
    IEW-->>Commit: toCommit (delayed by iewToCommitDelay)
    alt squash/mispredict
      Commit->>IEW: squash request
      IEW->>Exec: propagate squash
    end
    Commit->>Commit: commit / retire instruction
Loading

Estimated code review effort

🎯 3 (Moderate) | ⏱️ ~25 minutes

Suggested labels

perf, align-kmhv3

Suggested reviewers

  • tastynoob
  • Yakkhini

Poem

🐰 I hopped through wires, neat and bright,
One toCommit path now guides the light,
Squash and writeback tucked in line,
Cleaner hops through pipeline time —
🥕✨

Pre-merge checks and finishing touches

❌ Failed checks (1 warning)
Check name Status Explanation Resolution
Docstring Coverage ⚠️ Warning Docstring coverage is 0.00% which is insufficient. The required threshold is 80.00%. You can run @coderabbitai generate docstrings to improve docstring coverage.
✅ Passed checks (2 passed)
Check name Status Explanation
Description Check ✅ Passed Check skipped - CodeRabbit’s high-level summary is enabled.
Title check ✅ Passed The title accurately reflects the main change: refactoring the execWB wire to toCommit and updating instruction squashing logic accordingly.
✨ Finishing touches
  • 📝 Generate docstrings
🧪 Generate unit tests (beta)
  • Create PR with unit tests
  • Post copyable unit tests in a comment
  • Commit unit tests in branch rename-toCommit-align

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🚀 Coremark Smoke Test Results

Branch IPC Change
Base (xs-dev) 2.1005 -
This PR 2.1005 ➡️ 0.0000 (0.00%)

✅ Difftest smoke test passed!

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[Generated by GEM5 Performance Robot]
commit: dfc1a25
workflow: gem5 Align BTB Performance Test(0.3c)

Align BTB Performance

Overall Score

PR Master Diff(%)
Score 17.17 16.87 +1.76 🟢

@jensen-yan jensen-yan requested a review from tastynoob December 25, 2025 06:35
tastynoob
tastynoob previously approved these changes Dec 25, 2025
- Replaced wbDelay with iewToCommitDelay in the IEW class to clarify the delay between IEW and Commit.
- Updated comments to reflect the new variable and its role in achieving zero-cycle latency for IEW to Commit communication.

Change-Id: I43ab0206c70ea3d7152a40bd8f589dc8de164cc9
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Actionable comments posted: 1

📜 Review details

Configuration used: defaults

Review profile: CHILL

Plan: Pro

📥 Commits

Reviewing files that changed from the base of the PR and between dfc1a25 and 12374e1.

📒 Files selected for processing (3)
  • src/cpu/o3/BaseO3CPU.py
  • src/cpu/o3/iew.cc
  • src/cpu/o3/iew.hh
💤 Files with no reviewable changes (1)
  • src/cpu/o3/BaseO3CPU.py
🚧 Files skipped from review as they are similar to previous changes (1)
  • src/cpu/o3/iew.hh
🔇 Additional comments (6)
src/cpu/o3/iew.cc (6)

92-92: LGTM! Clear naming improvement.

The rename from wbDelay to iewToCommitDelay improves code clarity by explicitly indicating this delay governs the IEW→Commit path.


565-588: LGTM! Consistent refactoring.

All references to execWB have been correctly updated to toCommit throughout the branch misprediction handling. The logic remains unchanged, and the new naming better reflects the purpose of signaling commit about squash events.


604-626: LGTM! Consistent memory violation handling.

The rename from execWB to toCommit is properly applied throughout the memory order violation squash logic. All field accesses are correctly updated while preserving the original logic.


1577-1579: LGTM! Correct conditional check.

The condition properly references toCommit->squash[tid] and toCommit->squashedSeqNum[tid] to determine whether to process misprediction after execution, consistent with the wire renaming.


1820-1821: LGTM! Writeback path correctly updated.

The instruction writeback loop properly accesses toCommit->insts[inst_num] instead of the old execWB reference, maintaining consistency with the wire renaming throughout the IEW stage.


2046-2047: LGTM! Misprediction check correctly updated.

The conditional in checkMisprediction() properly references toCommit->squash[tid] and toCommit->squashedSeqNum[tid], consistent with the wire renaming across all squash handling paths.

@jensen-yan jensen-yan requested a review from tastynoob December 25, 2025 07:05
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🚀 Coremark Smoke Test Results

Branch IPC Change
Base (xs-dev) 2.1005 -
This PR 2.1005 ➡️ 0.0000 (0.00%)

✅ Difftest smoke test passed!

@XiangShanRobot
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[Generated by GEM5 Performance Robot]
commit: 12374e1
workflow: gem5 Align BTB Performance Test(0.3c)

Align BTB Performance

Overall Score

PR Master Diff(%)
Score 17.17 17.17 -0.00

[Generated by GEM5 Performance Robot]
commit: 12374e1
workflow: gem5 Align BTB Performance Test(0.3c)

Align BTB Performance

Overall Score

PR Previous Commit Diff(%)
Score 17.17 17.17 -0.00

@jensen-yan jensen-yan merged commit 8e5853f into xs-dev Dec 26, 2025
3 checks passed
@jensen-yan jensen-yan deleted the rename-toCommit-align branch December 26, 2025 02:19
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3 participants