`colorthresholding_accel:1.0` is not found in the IP Catalog

[haipnh]

Hi,

I'm trying to rebuild the project for my PYNQ-ZU board.

When I used make, it showed as following:

vivado -mode batch -source cv_dfx_4_pr.tcl -notrace

****** Vivado v2020.2 (64-bit)
  **** SW Build 3064766 on Wed Nov 18 09:12:47 MST 2020
  **** IP Build 3064653 on Wed Nov 18 14:17:31 MST 2020
    ** Copyright 1986-2020 Xilinx, Inc. All Rights Reserved.

Sourcing tcl script '/home/haipnh/.Xilinx/Vivado/Vivado_init.tcl'
source cv_dfx_4_pr.tcl -notrace
INFO: [IP_Flow 19-234] Refreshing IP repositories
INFO: [IP_Flow 19-1700] Loaded user IP repository '/mnt/workspace/Xilinx/PYNQ_Composable_Pipeline/boards/Pynq-ZU/ip'.
INFO: [IP_Flow 19-1700] Loaded user IP repository '/mnt/workspace/Xilinx/PYNQ_Composable_Pipeline/boards/ip/boards/ip'.
INFO: [IP_Flow 19-2313] Loaded Vivado IP repository '/tools/Xilinx/Vivado/2020.2/data/ip'.
INFO: [BD::TCL 103-2003] Currently there is no design <video_cp> in project, so creating one...
Wrote  : </mnt/workspace/Xilinx/PYNQ_Composable_Pipeline/boards/Pynq-ZU/cv_dfx_4_pr/cv_dfx_4_pr.srcs/sources_1/bd/video_cp/video_cp.bd> 
INFO: [BD::TCL 103-2004] Making design <video_cp> as current_bd_design.
INFO: [BD::TCL 103-2005] Currently the variable <design_name> is equal to "video_cp".
INFO: [BD::TCL 103-2011] Checking if the following IPs exist in the project's IP catalog:  
xilinx.com:ip:axi_iic:2.0 xilinx.com:ip:axi_intc:4.1 xilinx.com:ip:axi_gpio:2.0 xilinx.com:ip:proc_sys_reset:5.0 xilinx.com:ip:zynq_ultra_ps_e:3.3 xilinx.com:ip:dfx_axi_shutdown_manager:1.0 xilinx.com:ip:xlconcat:2.1 xilinx.com:ip:xlslice:1.0 xilinx.com:ip:axis_data_fifo:2.0 xilinx.com:ip:axis_dwidth_converter:1.1 xilinx.com:ip:axis_switch:1.1 xilinx.com:hls:colorthresholding_accel:1.0 xilinx.com:hls:filter2d_accel:1.0 xilinx.com:hls:gray2rgb_accel:1.0 xilinx.com:hls:LUT_accel:1.0 xilinx.com:hls:rgb2gray_accel:1.0 xilinx.com:hls:rgb2hsv_accel:1.0 xilinx.com:ip:smartconnect:1.0 xilinx.com:ip:axi_vdma:6.3 xilinx.com:ip:axis_subset_converter:1.1 xilinx.com:ip:v_demosaic:1.1 xilinx.com:ip:v_gamma_lut:1.1 xilinx.com:ip:mipi_csi2_rx_subsystem:5.1 xilinx.com:hls:pixel_pack_2:1.0 xilinx.com:ip:v_proc_ss:2.3 xilinx.com:ip:xlconstant:1.1 xilinx.com:ip:axi_register_slice:2.1 xilinx.com:ip:dfx_decoupler:1.0 xilinx.com:ip:axis_register_slice:1.1 xilinx.com:hls:dilate_accel:1.0 xilinx.com:hls:erode_accel:1.0 xilinx.com:hls:duplicate_accel:1.0 xilinx.com:hls:subtract_accel:1.0 xilinx.com:hls:color_convert_2:1.0 xilinx.com:ip:v_hdmi_rx_ss:3.1 xilinx.com:ip:v_hdmi_tx_ss:3.1 xilinx.com:hls:pixel_unpack_2:1.0 xilinx.com:ip:vid_phy_controller:2.2  .
WARNING: [Coretcl 2-175] No Catalog IPs found
ERROR: [BD::TCL 103-2012] The following IPs are not found in the IP Catalog:
  xilinx.com:hls:colorthresholding_accel:1.0

Can someone please help me to figure out the issue?

Thank you in advance.

[mariodruiz]

Hi @haipnh,

Did all of the HLS IP generate correctly?

I would also suggest you try the v1.1.0-dev branch that uses Vivado 2022.1 and PYNQ 3.0.1.

Mario