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fix(esp_lvgl_port): support CONFIG_LCD_RGB_ISR_IRAM_SAFE for RGB panels (BSP-787) #732

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fix(esp_lvgl_port): support CONFIG_LCD_RGB_ISR_IRAM_SAFE for RGB panels (BSP-787) #732

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a428e8e
fix(esp_lvgl_port): support CONFIG_LCD_RGB_ISR_IRAM_SAFE for RGB panels
matiasgibbons Mar 10, 2026
2bdec63
fix: address review feedback for IRAM-safe callback
matiasgibbons Mar 10, 2026
432f11d
fix(esp_lvgl_port): replace malloc with heap_caps_malloc for pre-comm…
matiasgibbons Apr 8, 2026
5b71d1f
fix(esp_lvgl_port): remove IRAM_ATTR from forward declaration
matiasgibbons Apr 16, 2026
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43 changes: 40 additions & 3 deletions components/esp_lvgl_port/src/lvgl9/esp_lvgl_port_disp.c
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Original file line number Diff line number Diff line change
Expand Up @@ -195,10 +195,18 @@ lv_display_t *lvgl_port_add_disp_rgb(const lvgl_port_display_cfg_t *disp_cfg,
#endif
};

/* When LCD_RGB_ISR_IRAM_SAFE is enabled, the callback must be in IRAM and
* cannot call lv_display_get_driver_data() (which resides in flash).
* Pass disp_ctx directly as user_ctx to avoid flash access from ISR. */
#if CONFIG_LCD_RGB_ISR_IRAM_SAFE
void *cb_user_ctx = disp_ctx;
#else
void *cb_user_ctx = disp_ctx->disp_drv;
#endif
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if (rgb_cfg->flags.bb_mode && (ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(5, 1, 2))) {
ESP_ERROR_CHECK(esp_lcd_rgb_panel_register_event_callbacks(disp_ctx->panel_handle, &bb_cbs, disp_ctx->disp_drv));
ESP_ERROR_CHECK(esp_lcd_rgb_panel_register_event_callbacks(disp_ctx->panel_handle, &bb_cbs, cb_user_ctx));
} else {
ESP_ERROR_CHECK(esp_lcd_rgb_panel_register_event_callbacks(disp_ctx->panel_handle, &vsync_cbs, disp_ctx->disp_drv));
ESP_ERROR_CHECK(esp_lcd_rgb_panel_register_event_callbacks(disp_ctx->panel_handle, &vsync_cbs, cb_user_ctx));
}
#else
ESP_RETURN_ON_FALSE(false, NULL, TAG, "RGB is supported only on ESP32S3 and from IDF 5.0!");
Expand Down Expand Up @@ -300,7 +308,14 @@ static lv_display_t *lvgl_port_add_disp_priv(const lvgl_port_display_cfg_t *disp
}

/* Display context */
lvgl_port_display_ctx_t *disp_ctx = malloc(sizeof(lvgl_port_display_ctx_t));
#if CONFIG_LCD_RGB_ISR_IRAM_SAFE
/* When ISR IRAM safety is enabled, the display context is passed directly
* to the ISR callback as user_ctx. It must reside in internal RAM so it
* remains accessible when the cache is disabled during SPI flash operations. */
lvgl_port_display_ctx_t *disp_ctx = heap_caps_malloc(sizeof(lvgl_port_display_ctx_t), MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT);
#else
lvgl_port_display_ctx_t *disp_ctx = heap_caps_malloc(sizeof(lvgl_port_display_ctx_t), MALLOC_CAP_DEFAULT);
#endif
ESP_GOTO_ON_FALSE(disp_ctx, ESP_ERR_NO_MEM, err, TAG, "Not enough memory for display context allocation!");
memset(disp_ctx, 0, sizeof(lvgl_port_display_ctx_t));
disp_ctx->io_handle = disp_cfg->io_handle;
Expand Down Expand Up @@ -509,6 +524,27 @@ static bool lvgl_port_flush_dpi_vsync_ready_callback(esp_lcd_panel_handle_t pane
#endif

#if CONFIG_IDF_TARGET_ESP32S3 && ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(5, 0, 0)
#if CONFIG_LCD_RGB_ISR_IRAM_SAFE
/* When LCD_RGB_ISR_IRAM_SAFE is enabled, this callback runs from IRAM.
* user_ctx is lvgl_port_display_ctx_t* to avoid calling lv_display_get_driver_data()
* which resides in flash and would crash when cache is disabled (e.g. during SPI flash ops). */
static IRAM_ATTR bool lvgl_port_flush_rgb_vsync_ready_callback(esp_lcd_panel_handle_t panel_io,
const esp_lcd_rgb_panel_event_data_t *edata, void *user_ctx)
{
BaseType_t need_yield = pdFALSE;

lvgl_port_display_ctx_t *disp_ctx = (lvgl_port_display_ctx_t *)user_ctx;
if (disp_ctx == NULL) {
return false;
}

if (disp_ctx->trans_sem) {
xSemaphoreGiveFromISR(disp_ctx->trans_sem, &need_yield);
}

return (need_yield == pdTRUE);
}
#else
static bool lvgl_port_flush_rgb_vsync_ready_callback(esp_lcd_panel_handle_t panel_io,
const esp_lcd_rgb_panel_event_data_t *edata, void *user_ctx)
{
Expand All @@ -525,6 +561,7 @@ static bool lvgl_port_flush_rgb_vsync_ready_callback(esp_lcd_panel_handle_t pane

return (need_yield == pdTRUE);
}
#endif /* CONFIG_LCD_RGB_ISR_IRAM_SAFE */
#endif
#endif

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