feat(component): add MilStd gates, arithmetic units, and data path components

[Cr4ckz]

Description
This PR significantly extends the hardware component library to support complex digital logic and processor architecture diagrams. All components follow a consistent design language and are ready for native use in Typst-based schematics.

New Components:

Logic Gates: Added MilStd (Military Standard) symbols for AND, OR, NOT, etc.

Transistors: Included simple CMOS-style transistor representations.

Arithmetic: Full-Adder and Half-Adder units.

Sequential: Registers and Flip-Flops (supporting top-side clock inputs).

Data Path: Multiplexers/Demultiplexers, Decoders, Shifters, and Sign/Zero-Extend blocks.

Documentation & Examples:

Examples: Added example4 and example5 to showcase the new components in a practical context.

Docs: Expanded the docs folder with detailed descriptions and parameters for all new symbols.

Quality Check:

Formatting: Code was cleaned using typstyle -l 180 -t 4 -i src as per the project guidelines.

Organization: Adheres to the "One PR per feature" rule.

[l0uisgrange]

Hey @Cr4ckz 👋! This PR is huge and can't wait to merge this!
Thanks a lot for the effort and dedication to this project ❤️. I juste have a few comments before we proceed.

[Cr4ckz]

Hey @Cr4ckz 👋! This PR is huge and can't wait to merge this! Thanks a lot for the effort and dedication to this project ❤️. I juste have a few comments before we proceed.

Thanks for the kind words! I’m glad you like the PR.
Thanks for the feedback! I've already addressed the comments and thex should be fixed. Let me know if everything looks good now!