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enhance: Introduce the support of Intel SVS#48798

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sre-ci-robot merged 1 commit intomilvus-io:3.0from
alexanderguzhva:introduce_intel_svs_30
Apr 7, 2026
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enhance: Introduce the support of Intel SVS#48798
sre-ci-robot merged 1 commit intomilvus-io:3.0from
alexanderguzhva:introduce_intel_svs_30

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@alexanderguzhva alexanderguzhva commented Apr 7, 2026 •
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pr: #48799

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Introduce the support of Intel SVS
54fc951 
Signed-off-by: Alexandr Guzhva <alexanderguzhva@gmail.com>
@sre-ci-robot sre-ci-robot requested review from bigsheeper and yhmo April 7, 2026 16:45
@sre-ci-robot sre-ci-robot added area/compilation size/M Denotes a PR that changes 30-99 lines. labels Apr 7, 2026
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mergify bot commented Apr 7, 2026

@alexanderguzhva Please associate the related pr of master to the body of your Pull Request. (eg. "pr: #")

@mergify mergify bot added dco-passed DCO check passed. do-not-merge/missing-related-pr kind/enhancement Issues or changes related to enhancement labels Apr 7, 2026
@sre-ci-robot sre-ci-robot added the do-not-merge/need-merge-master-first any pr merge to release branch need to merge master first label Apr 7, 2026
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sre-ci-robot commented Apr 7, 2026

[ci-v2-notice]
Notice: ci-v2 system is enabled for this PR (3.0 branch).

To rerun ci-v2 checks, comment with:

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@sre-ci-robot sre-ci-robot added the do-not-merge/need-milestone generate by v2-label-manager label Apr 7, 2026
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sre-ci-robot commented Apr 7, 2026

[INFO] PR Label Summary by Default
[WARNING] No dependent PR reference found

  • Target branch '3.0' requires a PR merged to master first
  • Please add reference in format 'pr: #number'

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@alexanderguzhva alexanderguzhva mentioned this pull request Apr 7, 2026
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sre-ci-robot commented Apr 7, 2026

✅ CI Loop Results 54fc951

Stage Result Duration Tests
✅ Build SUCCESS 8.1min -
✅ Code-Check SUCCESS 4.5min -
✅ UT-GO SUCCESS 15.0min 926 passed
✅ UT-Integration SUCCESS 23.2min 46 passed
✅ UT-CPP-Cov SUCCESS 28.7min 7031 passed

Total: 54min | Pipeline | Artifacts

@mergify mergify bot added the ci-passed label Apr 7, 2026
sre-ci-robot pushed a commit that referenced this pull request Apr 7, 2026
@alexanderguzhva
enhance: Introduce the support of Intel SVS (#48799)
98245e1 
related PRs:
* zilliztech/VectorDBBench#749 for vectordbbench
* zilliztech/knowhere#1537 for knowhere
* #48798 for Milvus 3.0

Signed-off-by: Alexandr Guzhva <alexanderguzhva@gmail.com>
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xiaofan-luan commented Apr 7, 2026

/lgtm
/approve

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sre-ci-robot commented Apr 7, 2026

[APPROVALNOTIFIER] This PR is APPROVED

This pull-request has been approved by: alexanderguzhva, xiaofan-luan

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@sre-ci-robot sre-ci-robot added approved and removed do-not-merge/need-merge-master-first any pr merge to release branch need to merge master first labels Apr 7, 2026
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sre-ci-robot commented Apr 7, 2026

[INFO] PR Label Summary by Default
[SUCCESS] PR #48799 merged to master

[WARNING] Milestone not set

You can set milestone by commenting:
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Example:
/set-milestone 2.5.0

Use /refresh-label to update related check and label manually

@xiaofan-luan xiaofan-luan added this to the 3.0 milestone Apr 7, 2026
@xiaofan-luan xiaofan-luan removed the do-not-merge/need-milestone generate by v2-label-manager label Apr 7, 2026
@sre-ci-robot sre-ci-robot merged commit 4bce816 into milvus-io:3.0 Apr 7, 2026
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@bigsheeper bigsheeper Awaiting requested review from bigsheeper

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approved area/compilation ci-passed dco-passed DCO check passed. kind/enhancement Issues or changes related to enhancement lgtm size/M Denotes a PR that changes 30-99 lines.

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