Clean up gpio.rs#155
Conversation
|
If we're doing a breaking change, we might want to consider @hannobraun's suggestion to reduce the macro surface area, instead moving to a more |
|
How is this performance wise? When I initially implemented this (I did the initial 840 impl) I thought that it rather save a few CPU cycles which are more important than the bit of memory we can save. |
|
This should have no performance implication on any chip with only one GPIO bank, and on the others most use cases should only be affected if the inliner fails. I'm happy to remove that change though, if anyone feels strongly. |
|
I have no strong feelings. I was just curious what the actual implications might be. I had to decide what to do initially and picked the one I thought was a better fit, without any proof or strong oppinion :) This change definitely seems ok to me. |
For reference, James is referring to #8, I believe. |
Fixes #146
This compacts the generic
Pinstruct to a single byte on all MCUs, encoding the port in the upper bit.Breaking change.