GitHub - stavspirid/fp-mult-IEEE754-SV: A floating point Multiplier developed during the Digital Hardware Systems 2 (HW2) course at ECE-AUTh.

A floating-point Multiplier developed during the Digital Hardware 2 (HW2) course at ECE-AUTh.

SystemVerilog was used for the DUT and testbenches. SVA were used for verification.

Name		Name	Last commit message	Last commit date
Latest commit History 4 Commits
HW2_Report.pdf		HW2_Report.pdf
README.md		README.md
assertions.sv		assertions.sv
defs.svh		defs.svh
exception_mult.sv		exception_mult.sv
fp_mult.sv		fp_mult.sv
fp_mult_top.sv		fp_mult_top.sv
normalize_mult.sv		normalize_mult.sv
round_mult.sv		round_mult.sv
test_tb.sv		test_tb.sv

Provide feedback