chore: add the version info to the simulation print output#4626
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Tang-Haojin merged 1 commit intomasterfrom Apr 29, 2025
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chore: add the version info to the simulation print output#4626Tang-Haojin merged 1 commit intomasterfrom
Tang-Haojin merged 1 commit intomasterfrom
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NewPaulWalker
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First, this does not introduce any functional changes. Second, the reason for this modification is that with the introduction of OpenXiangShan/XiangShan#4626, the simulation output includes some less elegant messages: Using simulated 32768B flash Core 0's Commit SHA is: 6683fc49ec, dirty: 1 Using simulated 8386560MB RAM This change makes the output look better.
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Tang-Haojin
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You can parameterize shaWidth and hartIdlen in PrintCommitIDModule.
src/main/scala/xiangshan/backend/fu/NewCSR/CommitIDModule.scala
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This allows the Git commit SHA and dirty status to be known directly from the simulation output. It helps in scenarios such as responding to issues in the XiangShan repository, where the version used can be identified directly from the provided log file.
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Tang-Haojin
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Apr 29, 2025
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This allows the Git commit SHA and dirty status to be known directly from the simulation output.
It helps in scenarios such as responding to issues in the XiangShan repository, where the version used can be identified directly from the provided log file.