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XiangShan Nightly Regression XiangShan Nightly Regression #51: Scheduled
4h 2m 21s master
master
4h 2m 21s
FPGA Nightly Regression FPGA Nightly Regression #123: Scheduled
30m 23s master
master
30m 23s
feat(ci): add workflow dispatch for STA timing analysis CI STA Nightly Regression #33: Pull request #817 synchronize by xiaokamikami
27s sta_ci
sta_ci
27s
feat(ci): add workflow dispatch for STA timing analysis CI CI #3060: Pull request #817 synchronize by xiaokamikami
20m 50s sta_ci
sta_ci
20m 50s
feat(ci): add workflow dispatch for STA timing analysis CI format #1808: Pull request #817 synchronize by xiaokamikami
36s sta_ci
sta_ci
36s
feat(ci): add workflow dispatch for STA timing analysis CI format #1807: Pull request #817 synchronize by xiaokamikami
37s sta_ci
sta_ci
37s
feat(ci): add workflow dispatch for STA timing analysis CI STA Nightly Regression #32: Pull request #817 synchronize by xiaokamikami
20s sta_ci
sta_ci
20s
feat(ci): add workflow dispatch for STA timing analysis CI CI #3059: Pull request #817 synchronize by xiaokamikami
20m 14s sta_ci
sta_ci
20m 14s
refactor(difftest): pipeline gateway stages with DecoupleIO format #1806: Pull request #802 synchronize by klin02
39s pipeline
pipeline
39s
refactor(difftest): pipeline gateway stages with DecoupleIO CI #3058: Pull request #802 synchronize by klin02
21m 48s pipeline
pipeline
21m 48s
feat(ci): add workflow dispatch for STA timing analysis CI STA Nightly Regression #31: Pull request #817 synchronize by xiaokamikami
1d 0h 0m 1s sta_ci
sta_ci
1d 0h 0m 1s
feat(ci): add workflow dispatch for STA timing analysis CI CI #3057: Pull request #817 synchronize by xiaokamikami
20m 30s sta_ci
sta_ci
20m 30s
feat(ci): add workflow dispatch for STA timing analysis CI format #1805: Pull request #817 synchronize by xiaokamikami
35s sta_ci
sta_ci
35s
difftest: pipeline FPGA batch bus + beat-serialize AXIS to ease conge… CI #3056: Pull request #847 synchronize by xiaokamikami
2m 44s difftest-fpga-timing-20260402
difftest-fpga-timing-20260402
2m 44s
difftest: pipeline FPGA batch bus + beat-serialize AXIS to ease conge… format #1804: Pull request #847 synchronize by xiaokamikami
45s difftest-fpga-timing-20260402
difftest-fpga-timing-20260402
45s
difftest: pipeline FPGA batch bus + beat-serialize AXIS to ease conge… format #1803: Pull request #847 synchronize by xiaokamikami
35s difftest-fpga-timing-20260402
difftest-fpga-timing-20260402
35s
difftest: pipeline FPGA batch bus + beat-serialize AXIS to ease conge… CI #3055: Pull request #847 synchronize by xiaokamikami
20m 40s difftest-fpga-timing-20260402
difftest-fpga-timing-20260402
20m 40s
difftest: pipeline FPGA batch bus + beat-serialize AXIS to ease conge… format #1802: Pull request #847 synchronize by xiaokamikami
33s difftest-fpga-timing-20260402
difftest-fpga-timing-20260402
33s
difftest: pipeline FPGA batch bus + beat-serialize AXIS to ease conge… CI #3054: Pull request #847 synchronize by xiaokamikami
18m 36s difftest-fpga-timing-20260402
difftest-fpga-timing-20260402
18m 36s
difftest: pipeline FPGA batch bus + beat-serialize AXIS to ease conge… CI #3053: Pull request #847 opened by xiaokamikami
19m 0s difftest-fpga-timing-20260402
difftest-fpga-timing-20260402
19m 0s
difftest: pipeline FPGA batch bus + beat-serialize AXIS to ease conge… format #1801: Pull request #847 opened by xiaokamikami
39s difftest-fpga-timing-20260402
difftest-fpga-timing-20260402
39s
Nightly Regression Nightly Regression #518: Scheduled
14m 10s master
master
14m 10s
XiangShan Nightly Regression XiangShan Nightly Regression #50: Scheduled
18h 48m 55s master
master
18h 48m 55s
FPGA Nightly Regression FPGA Nightly Regression #122: Scheduled
19h 35m 58s master
master
19h 35m 58s
Nightly Regression Nightly Regression #517: Scheduled
12m 41s master
master
12m 41s
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